OCM: questions and answers
(commented out) -- 21.48MHz (much troublesome with external device)
This could be a usefull speed with the gfx9000 and opl4.. They can handle higher bus speeds
Great !!! thanks for the vhdl code !!!!
Leo, where did you get the vhdl code?
dvik, in Grauw's blog, as I said above.
ah sorry, I missed that. I'll also download it and take a look.
1) USB is not implemented at all
Does someone know, if the OCM is USB master or would just act as a slave device? (if someone will implement USB at all)
2) Will changing CPU speed change also VDP speed ?
Very interesting question, as it would increase the speed in several software a LOT. But someone posted, that the VDP already works with 21Mhz, even if the Z80 runs in 3,5MHz mode. What does it mean?
Does someone know, if the OCM is USB master or would just act as a slave device? (if someone will implement USB at all)
2) Will changing CPU speed change also VDP speed ?
Very interesting question, as it would increase the speed in several software a LOT. But someone posted, that the VDP already works with 21Mhz, even if the Z80 runs in 3,5MHz mode. What does it mean?
Is there any persistent memory in the OCM, e.g. sram?
Is there any persistent memory in the OCM, e.g. sram?Isn't it possible to configure a part of the FPGA as SRAM?
So, anybody tried to compile the VHDL code himself ?
1) USB is not implemented at all
That was known in advance
.
1) The code was compiled using Altera's Quartus II
Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Web Edition
The 6.0 web edition is included on the CD.
Isn't it possible to configure a part of the FPGA as SRAM?
Maybe, but I don’t think so.
(commented out) -- 21.48MHz (much troublesome with external device)
Interesting, that makes sense.
2) Will changing CPU speed change also VDP speed ?
I don’t think so, but I haven’t tested. Someone on my blog asked whether I could measure command execution speeds, I suppose I’ll have to do that.
~Grauw
That was known in advance
.1) The code was compiled using Altera's Quartus II
Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Web Edition
The 6.0 web edition is included on the CD.
Isn't it possible to configure a part of the FPGA as SRAM?
Maybe, but I don’t think so.
(commented out) -- 21.48MHz (much troublesome with external device)
Interesting, that makes sense.
2) Will changing CPU speed change also VDP speed ?
I don’t think so, but I haven’t tested. Someone on my blog asked whether I could measure command execution speeds, I suppose I’ll have to do that.
~Grauw

By cax
Scribe (1721)
06-12-2006, 19:04