Fori=0to4999:ifi=4999thenproduceelsenext

Riiiiiiiiiiiiiiiight, and what's the point of that forumposting, Latok?

what's next latok???Now you make me curious And welcome Erik to the forum!

next?

[BEEP]

NEXT without FOR

Syntax Error in 0
NEXT!

The decision whether ocm will be produced is going to be taken during
the next weeks as Bazix said , it can be long !!! Hope to have my ocm
this year at least ...

Quote:

The decision whether ocm will be produced is going to be taken during the next weeks as Bazix said , it can be long !!! Hope to have my ocm this year at least ...

While we're waiting, we can spend our time with the MSXes we have.

Quote:

The decision whether ocm will be produced is going to be taken during the next weeks as Bazix said , it can be long !!! Hope to have my ocm this year at least ...

So why not prolonging the preorder periode?

coz i cant wait anymore ...

Erik: Could you please release some sort of documentation about Sunrice RS-232C? I've not seen even I/O ports documented anywhere online. Some documentation with few example codes for normal communication (for example 1200 8N1) would be more than wellcome!

I have thought for example mouse driver, so that you can use PC-serial mouse as MSX mouse and for example a patched disk ROM that communicates with PC. In these kind of projects you unfortunately can't use Fossil drivers. Fossil driver sources could be also VERY educational for many MSX programmers. Could you think about making them public?

@NYYRIKKI: I just lookup the GAL sources to verify the location of the i16550, and it seems that it is mapped to address 0x80..0x87. (Yes, that is the place where ASCII wanted to have a i8251 and i8253 for a MSX RS232C ;-)
The rest of the documentation about the interface is quite straightforward I think, it is just the i16550 spec.
About the sources... I have to look where they are and then I probably have to add some comments to make the sources less confusing. The most interesting part of the driver is that it adjust some memory limits, goes to BASIC, and it puts some characters into the keyboard buffer. The disadvantage of this is that a DOS->BASIC->DOS sequence is required to start Erix. I think I have seen another program which claims some memory without a visible transition through BASIC, but I forgot which program that was. Maybe it was the MSXCDEX.COM driver which takes some 'normal' memory as well.

But this is ofcourse off-topic...

[the almost on-topic mode enabled]
What is next after the OCM? The next three are obvious : OCM2, OCM2+ and OCM-tR.
It's more interesting to see what is coming after the OCM-tR! Maybe a OCM3?

[the real on-topic mode enabled]
!!!! I NEED A OCM !!!!

So, I really hope that I see a good positive news this month.... or next month.... or at least this year....

Otherwise :

@erik
I agree , I want my OCM !!!
...
I have also an IDE-RS232 combo from sunrise but never used RS232 since
I dont have the right cables ... but I lost my nice SONY MOS-1 mouse and
having some mouse system again would be nice !


@NYYRIKKI
15 years ago ( woaa i am getting old ) ,I had a canon RS232 cartridge with
real 8251/53 and I used these msdos commands COPY AUX <filename> or
COPY <filename> AUX which works fine between PC and MSX thanks to DOS
It is not exactly like a remote hardisk but it a begining...

I just grabbed quartus software inorder to co,pile vhdl code for many fpga targets.
And got T80 source from opencores.org and ESE sources for V9938/PSG/MAPPER/SCC...
It is strange there so many version of the vhdl , it does not seems straight forward to
compile all this together ...

Is there any non-japanese page with all this MSX FPGA code explained a little bit better ?

@Leo:
I do not know if you have any VHDL experience, I assume not... (but I might be wrong)

You will have to find out how to interconnect all the modules.
If you look for the entity part of the VHDL file, you see what 'pins' a VHDL module has. You should make a top-level VHDL file or a schematic which instantiates the other modules and makes the interconnection between them. This top-level description should also have the 'pins' that go to the actual pins of the FPGA.

The easiest way to do this is to make a top-level schematic. Quartus should be able to make symbols out of VHDL files, these symbols you can put on your schematic. This is easy because it gives a nice overview of the design, and you can draw wires and busses like any schematic entry tool. The disadvantage of using schematics is that you are forced to keep using Quartus, since other tools probably do not recognize the file format of the schematic. Therefore, a lot of designers make the top level in VHDL, because that is easier to re-use.

However, it might be a good idea to start with some small designs, just to get familiar with the language and tools.
Maybe this can help: www.acc-eda.com/vhdlref/