Still I can't run simulations with it

Message for HRA!... if still listening...

Hi HRA!, I'm trying to add a my custom component to 1chipMSX but I'm running low with available logic elements.
Please, may I ask you to design a custom version of 1chipMSX starting from the last, more stable and complete version but WITHOUT dual MEGARAM and SCC?
This should permit to:
- save about 900 logic elements
- mantain MSX2 (2+) compatibility

Maybe it could be useful to use other Analisys & Syntetize tools like Synplify which should save still some LEs.

Thanks for your attention
Best regards

Are youn using T80 core in fast mode ? on the entity there is a generic that aloows to set
the Z80 mode , 8080 only , regular Z80 and fast Z80 .

By the way there is a faster Z80 implementation than T80 , on opencores , there is
the high perf Z80 : wb_Z80 and also the the core fz_80 used in PC8800 fpga implementation
that is 4x faster than T80 as someone has shown here :

http://japanese.sugawara-systems.com/opencores.htm

(ok its japanese but graph is graph )

I never tried the fastz80 mode of 1chipMSX, good suggestion, I'll try asap.
About using other T80 cores, I'm a bit sceptic, in particular because bios is not designed to support a too fast cpu and many "delays" now could work fine simply because timings are relaxed.
Even I/O could be "damaged" from a non standard z80 behaviour... I should investigate but I think I have not enough experience for so complex designs.

somehow the VRAM and the RAM access are multiplexed in the 1chipmsx to access to the external SDRAM through SDRAM controller , maybe the bottleneck is there

Quote:

Please, may I ask you to design a custom version of 1chipMSX starting from the last, more stable and complete version but WITHOUT dual MEGARAM and SCC?

Has made variant on a basis the stable versions from HRA in view of your wish: www.caro.k66.ru/files/ocm_0709.zip

Quote:

This should permit to: - save about 900 logic elements

was really kept about 600 LE.

Quote:

Has made variant on a basis the stable versions from HRA in view of your wish: www.caro.k66.ru/files/ocm_0709.zip

Really thanks for your help, caro!

Quote:

was really kept about 600 LE.

Only 1 megaram was removed but this is already useful for me!

Boot takes more time than original ocm... or its me that I'm too eager to see MSX2+ logo

Dunno if this is the best place for this request but seems related to me.
I'm using caro's last ocm design and I get troubles when accessing MusicModule if cpu speed is 10,5MHz.
Everything goes fine @ 3,5MHz.

I imagine this would not be an issue on a TurboR machine: getCpu/chgCpu would switch cpu (and its speed) granting access to "slow" peripherals in old/compatible z80 mode.

On ocm it is not possible to switch (increase/decrease) cpu speed during runtime so here arise my question:
does a "standard method" to detect/set cpu speed exist?
(for example I read A1WSX MSX2+ computers could range cpu speed between 3,58 and 5,38MHz by access to MSXengine via I/O ports)

Hello, i just installed the Caro port for the Altera board, the version i installed is: [unstable release] (last update 2008/07/12 24:27)

Has anyone please the info for all the DIP switches used on the board? I think they differ a little from the OCM one.

Also, what roms i need to copy to the SD card to support all the hardware the board have implemented? Also, do i need to rename each rom to an especific name to be loaded?

Thanks

Quote:

Has anyone please the info for all the DIP switches used on the board? I think they differ a little from the OCM one.

For unstable version OCM on DE1 from HRA 2008/07/12

SWITCH 0 - RESET

RED LEDS:
7..0 - status DIP7..DIP0
8 - 10 Hz
9 - POWER
GREEN LEDS:
7 - status SD/MMC drive;
6 - status CPU CLK; on - 10,74; off - 3.58
5 - status SLOT 1;
4 - status SLOT 2;
3 - VDP MODE; on - High Speed; off - Normal (can be toggled with [SHIFT]+F12 key)
2 - 0
1 - 0
0 - 0

PDIP(1..0) - initial video output select (can be cycled with PrtSc key)
11 = Composite Video and S-Video
10 = 15 kHz RGB (SCART)
01 = 31 kHz VGA
00 = 31 kHz VGA (high luminance)

PDIP(2) - primary slot 1
1 = normal cartridge slot
0 = ESE-SCC: 1024K+SCC-I

PDIP(3) - keyboard
1 = 106/109 keys, direct japanese layout
0 = 101/104 keys, converted from international layout

PDIP(4) - disk rom
1 = off
0 = on, SD/MMC as drive

PDIP(5) - initial CPU clock select (can be toggled with F12 key)
1 = 3.58 MHz
0 = 10.74 MHz

PDIP(7..6) - primary slot 2
11 = normal cartridge slot
10 = ESE-SCC: 512K+SCC-I
01 = ESE-RAM: 512K+ASCII8
00 = ESE-RAM: 512K+ASCII16

Thanks caro.

Message for Caro or HRA! :
Any chance to get your Msx implementation on a Altera DE2?
TIA

Quote:

Any chance to get your Msx implementation on a Altera DE2?

I unfortunately do not have DE2, otherwise I would have done.

Caro : thanks for you answer. Any idea how hard could be the implementation on DE2? I'm looking for an altera board and this can be an important point

Is "MEGA-SD.ROM" needed in the sd card of the Altera DE1 in order to boot? What's that file?