hi, i've test program that have the first 160 lines where there are a lot of sprites on screen, then a HBLANK setup to fire on line 180. below the line 160 there are no sprites.
Because i have more than 8 sprites on a row i expect to read the 5s bit set when the HBLANK on row 180 is triggered.

IT'S NOT!

the vdp is v9938 the screen mode is 5 r23=0 always.

I know this trick is used to do screen split on msx1, for me is not required what i only need is to have more time available to perform vram access, but at row 180 i need to know if i have a 5s set or not.

Anyone know if the 5s bit is set only in vblank or (that is what i guess and also true on TMS VDP) as soon as a sprite overflow occours during screen rendering?

At what x coordinate do you have your sprites? If the sprites are outside the display area, the 5s bit won't be set. The 5s bit is set on the scanline where you have more than 8 sprites, so it is as soon as you get the overflow.

*EDIT* This is true for collision bit, but I actually don't remember the behavior on the 5s bit. I did test it at one point but forgot what the behavior was.

Also at what y coordinate do you have your sprites. I assume they are higher up than row 180, so the overflow is prior to the location where you read the status register.

Quote:

Also at what y coordinate do you have your sprites. I assume they are higher up than row 180, so the overflow is prior to the location where you read the status register.

Hi,dvik
X between 10 and 200 , y at 120

I've not got time to verify but it's likely a bug in my routine. It's almost impossible that there is such problem. I remember that i've tested your demos on the msx2 and even in msx1 modes they worked well, so the trick is working.
(Even in bluemsx/openmsx than on real machine)

I will keep you informed if there is anything interesting.

Yeah, the trick should work fine. I've been using it on MSX1 and tested it on MSX2 without big problems. There are some minor issues on MSX1 at least, and that is if you read the status register at the same time, the 5s or collision or vblank bits are being set, the register is cleared, but the value you read does not have the bits set, so you essentially miss the event.

verified, was a my issue... sorry...