Zemmix Neo (and probably OCM) issue

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Por Eugeny_Brychkov

Paragon (1107)

Imagen del Eugeny_Brychkov

20-04-2016, 17:43

Hello, as you know I have developed device called GR8NET - a cartridge which can be inserted in the MSX machine and is expected to work there Big smile
I had made several firmware development iterations since the beginning, and today we discovered that Zemmix Neo does not work with GR8NET, however with one of the first versions of its FPGA firmware it was working well. The change at GR8NET side was in the timing of the bus to allow it working in Turbo-R devices in turbo mode.

We have just tested cartridge works in MSX1/2/2+ machines, in Turbo-R machine in turbo and Z80 mode, and I also checked on my ancient OCM with one of the first releases of FPGA configuration that GR8NET works on it.

I have question for community who is developing FPGA-MSX machines -

  1. Does Zemmix Neo use the same configuration files/algorithms as ESE?
  2. Anyone developing MSXBUS access of OCM/Zemmix can confirm (with facts, not just words - e.g. timing diagrams, scope shots) that their logic complies with Z80 hardware specifications?

Thank you.

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Por gdx

Prophet (3091)

Imagen del gdx

21-04-2016, 00:37

Several cartridges do not work correctly on OCM and clones. I think it was designed to run the simple Rom cartridges.

Por Grauw

Ascended (8516)

Imagen del Grauw

21-04-2016, 00:50

Never encountered such issues myself, all my hardware that I’ve tried works… (haven’t tried GR8NET tho)

Por gdx

Prophet (3091)

Imagen del gdx

21-04-2016, 01:06

Try old floppy disk interface or cartridges with sound chip inside for example.

Por mygodess

Champion (258)

Imagen del mygodess

21-04-2016, 05:22

I designed the Zemmix Neo but it is almost same with OCM. It just has some improvement for scanline.
If the GR8NET is not working with OCM then it will not work with Zemmix Neo.
I don't have much knowledge for FPGA firmware. Maybe you could ask to KDL.
http://gnogni.altervista.org/

Por Eugeny_Brychkov

Paragon (1107)

Imagen del Eugeny_Brychkov

21-04-2016, 08:42

Thank you.

mygodess wrote:

If the GR8NET is not working with OCM then it will not work with Zemmix Neo.

I wrote

Eugeny_Brychkov wrote:

I also checked on my ancient OCM with one of the first releases of FPGA configuration that GR8NET works on it.

Thus it works on OCM.

Por mygodess

Champion (258)

Imagen del mygodess

21-04-2016, 08:46

The ancient OCM is compatible with MSX2. Zemmix Neo and newer OCM uses KDL's comfiguration which is compatible with MSX2+. That's why you need to ask to KDL about what is changed from first release of OCM.

Por Eugeny_Brychkov

Paragon (1107)

Imagen del Eugeny_Brychkov

21-04-2016, 08:53

The point is that MSX2 and MSX2+ do not have any difference in MSX bus timing bus clock is the same, CPU is the same.
Ok, I understand that you can not help me now. I sent KdL email asking for support for the contemporary FPGA configuration.

Por Grauw

Ascended (8516)

Imagen del Grauw

21-04-2016, 09:53

Cartridges with sound chip work fine on my Zemmix Neo. There was a bug with the OPL4 but that has been fixed (I don’t recall what the exact problem was but I don’t think it had to do with bus timing).

Eugeny: For the record, OCM firmware is open source, you can find the VHDL code in the packages on KdL’s site.

Por Eugeny_Brychkov

Paragon (1107)

Imagen del Eugeny_Brychkov

21-04-2016, 10:23

Grauw wrote:

Eugeny: For the record, OCM firmware is open source, you can find the VHDL code in the packages on KdL’s site.

My issue is that I do not read VHDL Shocked!. I am very afraid that this issue will be shifted to me and I will be left alone to solve the problem with product which I did not design and manufacture.

Edit: it may appear that issue is not with OCM/Zemmix, but with GR8NET, but I will anyway need support from developers of OCM/Zemmix to figure it out.

Por Eugeny_Brychkov

Paragon (1107)

Imagen del Eugeny_Brychkov

21-04-2016, 23:29

I took my oscilloscope and compared two instances:

  1. Real machine, MSX2 Yamaha YIS503III
  2. OCM (original hardware by ESE), firmware v.3.2

Measured wires are:

  • SLTSL on the cartridge edge connector;
  • IORQ on the cartridge edge connector;
  • RD on the cartridge edge connector;
  • WR on the cartridge edge connector;
  • CLOCK on the cartridge edge connector;

Signal positioning relative to CLOCK
SLTSL: opcode prefetch

Z80: activates approximately 40 ns after clock falling edge, deactivates approximately same 40 ns after rising edge;
OCM: activates almost at the same time with clock's falling edge, deactivates at the same time with clock's rising edge.
Duration in both cases: 2.5 T-cycles

SLTSL: data access

Z80: activates approximately 40 ns after clock falling edge, deactivates approximately same 40 ns after falling edge;
OCM: activates almost at the same time with clock's falling edge, deactivates at the same time with clock's falling edge.
Duration in both cases: 2 T-cycles

Signal positioning relative to SLTSL
RD: memory data read
In both cases, Z80 and OCM, signals activate and deactivate at the same time, with duration of 550ns (2 T-cycles, I assume it is data read).

WR: memory data write
In both cases, Z80 and OCM, SLTSL duration is 550ns (2 T-cycles), WR starts ~270ns (1 T-cycle) after SLTSL activation, but in case of Z80 WR starts and ends 30ns earlier, thus when deactivating WR deactivates first, and the SLTSL within ~30ns.

Signal positioning relative to IORQ
RD: port data read

In both cases, Z80 and OCM, IORQ duration is ~700ns (2.5 T-cycles), but there's difference in WR:
For Z80 WR signal starts with IORQ and ends with IORQ;
For OCM WR signal starts 140ns (0.5 T-cycle) after IORQ activates and ends with IORQ;

WR: port data write
Situation is the same as with port read: for OCM activtion of WR signal is delayer by 0.5 T-cycles.

My conclusions:

  1. OCM is "ideal" model of the Z80 (looking to the shape of waveforms on my scope);
  2. OCM has slightly different timing in SLTSL relative to system clock;
  3. OCM activates WR for port write 0.5 T-cycles later than Z80.
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