OK, let's explain the acronym:
Y et
A nother
S tupid
V dp
Limitation
During investigation in r5 and r11 vdp registers (SAT attribute table address) i've found some 'peculiarities' of bits usage from the vdp when working in sprite mode 1 or 2.
I must admit, that after more than 30 years the vdp keep surprising me in how they managed to setup not needed behaviours that finally turns out to be another limitations.
After i've saw how lower bits in r5 are used in r5, another thing surprised me. the wiki say that the higher bits (> upper 64K range) are only used in screen 7-8.
I hope this is a documentation mistake, because otherwise this would mean that , if i need, i cannot set the SAT on the upper 64K (in a 128K vram machine, of course), when working, for example in screen 5, leaving page 0-1 free from sprite data.
I think this behaviour is unnecessary, why the VDP should mask out as zero those higher bits in screen 4-5-6? if i want to be on the lower 64K it's my responsability to keep them 0. By contrast, by forcing them to be 0 you remove me some flexibility in address placement.
Can anyone confirm this is true on a real machine? I CANNOT BELIEVE THIS. I CANNOT BELIEVE, REALLY. Maybe yamaha designers asked Kuttag for some stupid idea? 
:-( 
