RST 30h

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By ARTRAG

Enlighted (6187)

ARTRAG's picture

12-10-2018, 09:21

Humm, the discussion about what is broken, the standard (incomplete or unspecified) or those machines (with ram and rom in the same primary slot), is more than philosophical, it falls in the category onanism.

Why not just document the problems and let the coder decide if and how to deal with it?
Personally I have my own custom solution that is dealing with this problem by analyzing the slot situation at set up time.
If ram and rom are in different slots, I use rst 30h, if they are in the same primary slot, the code try to see if ram in page 3 is in the same primarily slot of bios and ram in page 0. If this is the case the hook, has custom page flipping using register in - 1 and port A8h (I cannot assume that none has changed primarily slot in page 0 between an interrupt and another).
If not, the installation will skip the music player.

By gdx

Prophet (2857)

gdx's picture

12-10-2018, 09:42

ARTRAG wrote:

Humm, the discussion about what is broken, the standard (incomplete or unspecified) or those machines (with ram and rom in the same primary slot), is more than philosophical, it falls in the category onanism.

I think it would be better to know the cause. For that we have to discuss it.

By ARTRAG

Enlighted (6187)

ARTRAG's picture

12-10-2018, 10:13

Ok, but in the end the coders will as they like, so the best one can do is to document the problem and make anyone aware of what is going on if you call code in ram in page 0 using bios.

What I really see broken here is the choice of the standard of mapping the sub slot registers in ram at -1 instead of using a port, but it has been done, so there is no way to change this error.

By Eugeny_Brychkov

Paragon (1079)

Eugeny_Brychkov's picture

12-10-2018, 10:26

ARTRAG wrote:

What I really see broken here is the choice of the standard of mapping the sub slot registers in ram at -1 instead of using a port, but it has been done, so there is no way to change this error.

This statement perfectly falls into your definition of onanism in your previous post Smile :

ARTRAG wrote:

Humm, the discussion about what is broken, the standard (incomplete or unspecified) or those machines (with ram and rom in the same primary slot), is more than philosophical, it falls in the category onanism.

gdx wrote:

I think it would be better to know the cause. For that we have to discuss it.

I join this point of view: as issue is identified, and this is great, let's develop solution or workaround, but to develop it we must know why issue was raised in the first place - what is an applied rationale for it.

And again - there's already a solution - DOS. It has required code which can be investigated and used if needed.

By DarkSchneider

Paladin (819)

DarkSchneider's picture

12-10-2018, 10:42

Grauw wrote:

Is the fact that WRSLT and RDSLT have explicit handling for the slot 0 page 0 case and CALSLT, CALLF and ENASLT do not, not sufficient evidence that it is intentionally not supported?

Where is the evidence of that? We only read:

Quote:

RDSLT (000CH) *1
Function: selects the slot corresponding to the value of A and reads
one byte from the memory of the slot. When this routine is
called, the interrupt is inhibited and remains inhibited
even after execution ends.
Input: A for the slot number.

F000EEPP
- ----
| ||++-------------- Basic slot number (0 to 3)
| ++---------------- Expansion slot number (0 to 3)
+--------------------- "1" when using expansion slot

HL for the address of memory to be read
Output: the value of memory which has been read in A
Registers: AF, BC, DE

WRSLT (0014H) *1
Function: selects the slot corresponding to the value of A and writes
one byte to the memory of the slot. When this routine is
called, interrupts are inhibited and remain so even after
execution ends.
Input: specifies a slot with A (same as RDSLT)
Output: none
Registers: AF, BC, D

CALSLT (001CH) *1
Function: calls the routine in another slot (inter-slot call)
Input: specify the slot in the 8 high order buts of the IY register
(same as RDSLT). IX is for the address to be called.
Output: depends on the calling routine
Registers: depends on the calling routine

ENASLT (0024H) *1
Function: selects the slot corresponding to the value of A and enables
the slot to be used. When this routine is called, interrupts
are inhibited and remain so even after execution ends.
Input: specify the slot by A (same as RDSLT)
specify the page to switch the slot by 2 high order bits
of HL
Output: none
Registers: all

CALLF (0030H) *1
Function: calls the routine in another slot. The following is the
calling sequence:

RST 30H
DB n ;n is the slot number (same as RDSLT)
DW nn ;nn is the called address

Input: In the method described above
Output: depends on the calling routine
Registers: AF, and other registers depending on the calling routine

Quote:

If ram and rom are in different slots, I use rst 30h, if they are in the same primary slot, the code try to see if ram in page 3 is in the same primarily slot of bios and ram in page 0. If this is the case the hook, has custom page flipping using register in - 1 and port A8h (I cannot assume that none has changed primarily slot in page 0 between an interrupt and another).

It also crash if RAM and ROM are in the same slot? How are slot operations handled then? If that is the case, they should advice about it. If the advice exists, is fault of the manufacturers for ignoring, if doesn't, is fault of the platform designer for not advicing.

If the last, then probably we are in a case like:

Quote:

640 K ought to be enough for anybody

They never thought the case that ROM software would ever use 64KB of RAM. Probably they expected low RAM requisites for ROM software, and when 64KB where usable, the software would be made for an OS, which take care of that.

By Grauw

Enlighted (8186)

Grauw's picture

12-10-2018, 10:49

DarkSchneider wrote:
Grauw wrote:

Is the fact that WRSLT and RDSLT have explicit handling for the slot 0 page 0 case and CALSLT, CALLF and ENASLT do not, not sufficient evidence that it is intentionally not supported?

Where is the evidence of that?

I mentioned it earlier:

“That’s a good find! I already started thinking after I wrote it that huh, why does it work for RDSLT and WRSLT actually. Indeed it looks like they made a special code path for reading from slot 0 page 0.”

DarkSchneider wrote:

It also crash if RAM and ROM are in the same slot? How are slot operations handled then? If that is the case, they should advice about it. If the advice exists, is fault of the manufacturers for ignoring, if doesn't, is fault of the platform designer for not advicing.

Definitely it would’ve been better if the documentation warned about this, for ENASLT too, this is an omission. But at least my conclusion is that you just aren’t supposed to interslot call code in page 0 except the BIOS. The somewhat logical reasoning behind being that the ISR entry point wouldn’t be present if you did (speculation on my part). There’s a separate API for subrom calls (SUBROM and EXTROM). If you want to use the RAM in slot 0, use the DOS environment.

So in my opinion it’s the case that there is an omission in the documentation and that you’re trying to do something that was not intended, rather than of systems being faulty.

By DarkSchneider

Paladin (819)

DarkSchneider's picture

12-10-2018, 10:52

Remember that a specification is not the implementation. So the code itself is not the specification. That would be the documentation of the platform (hardware for manufacturers and software for programmers).
A programmer cannot look at a BIOS code, that could be different on any system (as is manufacturer concern to adapt it to its system), for those things.

Quote:

But at least my conclusion is that you just aren’t supposed to call code in slot 0 except interslot calls to the BIOS

That would fit with:

Quote:

and when 64KB where usable, the software would be made for an OS

They lacked? Maybe, it were obscured times for the arising technology. Obviously we learned a lot from it.

By Grauw

Enlighted (8186)

Grauw's picture

12-10-2018, 10:57

DarkSchneider wrote:

Remember that a specification is not the implementation. So the code itself is not the specification. That would be the documentation of the platform (hardware for manufacturers and software for programmers).
A programmer cannot look at a BIOS code, that could be different on any system (as is manufacturer concern to adapt it to its system), for those things.

True, but when there is a problem in the level of detail of the documentation, one can look at the implementation to derive the intent. It’s an extra information point that helps making an informed guess. So that’s why I think it’s relevant info.

By DarkSchneider

Paladin (819)

DarkSchneider's picture

12-10-2018, 10:57

Well if that was the 1st original BIOS code made by ASCII/MS for the manufacturers to be used as base (at the end they probably simply copy-pasted), that would be true.

By Grauw

Enlighted (8186)

Grauw's picture

12-10-2018, 10:58

Pretty sure the BIOS that ASCII provided was generally just used it verbatim, yeah, perhaps after modifying some hardcoded values like regional information (and RAM amount for MSX2), or maybe they were just provided with different builds based on their needs. After all it was supposed to be easy to build a machine with all the components and software already provided. Doubt manufacturers even had access to the BIOS source code?

There must also be additional documentation that was provided to system manufacturers that we have no insight in unfortunately, it would also be helpful. All we know is that statement about the slot layout standardisation they made for MSX2+ as mentioned in the turboR technical handbook, which implies that before that change the manufacturers were allowed more flexibility.

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