VDP access preventing interrupt triggering?

By DarkSchneider

Paladin (862)

DarkSchneider's picture

16-09-2019, 09:07

After searching, I will start from this point:
https://www.msx.org/forum/msx-talk/development/interrupts-and-vdp-access
But is something different so I created a new topic.

So, if we have to DI/EI to access the VDP (registers or VRAM access), it could prevents the interrupts to be triggered, line or even vblank?

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By Grauw

Ascended (8386)

Grauw's picture

16-09-2019, 09:38

No, interrupt request (/IRQ) signals are continuous, not just a single missable pulse, the device keeps it raised until it is unflagged manually by an interrupt hander. That's why if you don't handle an interrupt the MSX will get stuck in an infinite cycle of unhandled interrupts triggering over and over again.

One instruction after the EI the CPU will recognise the IRQ and the interrupt handler will execute as normal. Albeit delayed by a few cycles, so if you have timing sensitive stuff like line splits, best keep interrupts disabled for as short as possible.

By DarkSchneider

Paladin (862)

DarkSchneider's picture

16-09-2019, 10:06

Nice, so it keeps in "triggering interrupt" until the EI and then with a delay of 1 it triggers it. OK that saves me to make the sync stuff.
Thanks.

By gdx

Prophet (2978)

gdx's picture

16-09-2019, 10:44

And interrupt request from VDP will canceled when the register status 0 or 1 will be read.

By Grauw

Ascended (8386)

Grauw's picture

16-09-2019, 11:31

DarkSchneider wrote:

Nice, so it keeps in "triggering interrupt" until the EI and then with a delay of 1 it triggers it. OK that saves me to make the sync stuff.

It will even continue to raise the /IRQ after the interrupt is triggered (which also automatically DIs), it only stops when VDP status register 0 is read (for vblank int) or status register 1 (for hblank int). Each device has its own means of acknowledging and disabling the IRQ, e.g. the OPL4 timer IRQ is reset by writing a 1 to the RST bit in register 004H.

Note that the RETI instruction (which you may have noticed) does nothing in the MSX architecture. EI / RET is the normal interrupt return sequence. Which also explains why EI is delayed by 1 instruction, to prevent the stack from exploding for unhandled interrupts (it enables interrupts after the return).