Which of these is faster?

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By albs_br

Master (147)

albs_br's picture

22-09-2020, 17:46

Newbie question: how do I know if i'm on VBLANK? Haw many cycles it last, how many bytes I can transfer to VRAM?

I know there is difference between 50 and 60Hz, so I need to take the worst case to calc it.

By albs_br

Master (147)

albs_br's picture

22-09-2020, 19:28

On the Status Register definition on the wiki (https://www.msx.org/wiki/VDP_Status_Registers#Status_Register_0) there are two definitions for the F flag. Is it an error?

By Grauw

Ascended (9342)

Grauw's picture

23-09-2020, 00:33

At 60 Hz there are 262 lines in a screen. At 50 Hz there are 313 lines in a screen. When the active display area is 192 lines, this means that the blanking period at 60 Hz lasts 70 lines. One line takes 228 CPU cycles @ 3.58 MHz to display. So 70 lines of blanking last for 15960 CPU cycles.

The blanking period starts when the vblank interrupt (F) occurs. Please note that the system interrupt handler takes some time to execute as well, so if you want to maximise the transfer during vertical blanking, it’s best to perform the transfer in a H.TIMI hook which will execute before the remainder of the interrupt handler.

As for documentation on the registers, I recommend to consult the Texas Instruments TMS9918 manual and programmer’s guide.

Lastly, unless it is really absolutely necessary to have that extra data transfer bandwidth, in general I would advise against transfering at high speed during vertical blanking since it is a hassle and timing sensitive.

By pgimeno

Master (238)

pgimeno's picture

22-09-2020, 23:19

I measured the time from interrupt to first write failure depending on the time between writes, for screen 0-3, on several machines:

https://notabug.org/pgimeno/vdptest/src/master/RESULTS.txt

To sum up, for SCREEN 2:

- on MSX1, you can write as fast as you want for 27130 cycles after an interrupt;
- on MSX2, you need at least 22 cycles between outs (not between out instructions! the time of the out instruction itself is counted in the 22) and then it doesn't matter if you're in VBLANK or out of it.

By Grauw

Ascended (9342)

Grauw's picture

23-09-2020, 00:42

pgimeno wrote:

- on MSX1, you can write as fast as you want for 27130 cycles after an interrupt;

This measurement is for 50 Hz. There it spends 121 lines in the blanking period, which corresponds to about that amount of cycles. However, of course this would not be compatible with 60 Hz systems, where the vertical blanking period is significantly shorter (70 lines), and you will get VRAM corruption on any NTSC MSX if you write software which would access it at maximum speed for so long.

By pgimeno

Master (238)

pgimeno's picture

23-09-2020, 13:06

Indeed, sorry that I didn't add the results for any NTSC machine. The only one I have is a Casio PV-7. The results for the PV-7 are that in screen 2, you can write to VRAM as fast as you want up to cycle 15503 after the interrupt. I've updated the text file.

By gdx

Prophet (3753)

gdx's picture

23-09-2020, 14:38

pgimeno wrote:

- on MSX1, you can write as fast as you want for 27130 cycles after an interrupt;

I did not test during a Vblank but on my MSX1s, this works:

	ld	b,e
	xor	a
ldirvm_lp1:
	outi
	jr	nz,ldirvm_lp1
	cp	d
	ret	z	;back if bytes to transfert <256
ldirvm_lp2:
	outi
	jr	nz,ldirvm_lp2
	dec	d
	jr	nz,ldirvm_lp2
	ret

But not this:

	ld	b,e
	xor	a
ldirvm_lp1:
	otir
	cp	d
	ret	z	;back if bytes to transfert <256
ldirvm_lp2:
	otir
	dec	d
	jr	nz,ldirvm_lp2
	ret

several OUTIs one after the other does not work either. (too fast)

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