DPF-550 Floppy drive

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By mohai

Paladin (971)

mohai's picture

19-01-2011, 23:29

The only diskROM i found that could be suitable is the Brazilian Microsol (DDX drive). That drive is port-driven too (I/O 0xD0), as AVT DPF 550.
I have looked in other ones like Talent and Daewoo, but all of them seem to be memory-driven.

I am testing to run that Microsol ROM from RAM, but it seems not to detect any compatible drive. Sad

I will have to dis-assemble compare both and make changes by myself...

By RetroTechie

Paragon (1563)

RetroTechie's picture

20-01-2011, 17:35

This AVT model DPF-550, is it accessing the controller through memory addresses or I/O ports? I can't tell from schematic linked above, it's almost unreadable in places. It should be easy to tell when you check the low-level routines with a debugger...

Of course if you have a memory-driven interface the diskROM should be too, and same if it's talking to the controller via I/O ports. If ports / memory addresses are different from what you need, you might be in a world of hurt Wink ,but usually hardware configurations follow one of a select few, with some minor differences at most.

By mohai

Paladin (971)

mohai's picture

21-01-2011, 10:39

I am afraid that this model is slightly different from Talent one.
Talent one is memory-driven and AVT is port-driven (0xD0).

As Flyguille said, Talent drive is controlled via memory addresses 7fb8-7FBF (3Fb8-3Fbf and so, as A15,A14 are ignored).

I have to study hardware inside AVT, but i think that the only difference is memory/port decoding. I hope all other hardware is the same.

Another difference is that AVT has some chips inside cartridge (ROMS, port address decoder and 2 bus drivers), but Talen one is an all-in-one drive.

By the way, disks are signed as DWDPF510. This make me think that ROM in AVT is from another model and does not
make use of all features in this drive.

By mohai

Paladin (971)

mohai's picture

03-02-2011, 18:20

I found something better, the original daewo scheme draw.
http://3.bp.blogspot.com/_lGdEZweweRo/S9EbwfPKEJI/AAAAAAAAALE/6xnmJei8qcI/s1600/dpf550sche.jpg
and here is the datasheet of WD chip
http://www.datasheetarchive.com/WD1772-datasheet.html
I found that you are right, D3 at 7fbc is controlling the switching DDEN of WD (FM vs MFM compression aka SD vs DD).
But I do not remember that in my Talent model, maybe in my talent model it is fixed to DD. & D3 controls Motor ON.
IC8 is the holder of the 7fbc / bfbc register WRITE ONLY register.

Thanks for the schemes.
After studying AVT interface, i found that both are very similar.

AVT model, first decodes base port 0xD0 and do the EPROM selection (Yes, 2x8KB EPROM are used here too).
After it, the rest of the board is the same. I will explain:

 port			read			write

D0 - WD1770 control: 	Status Register		Command Register
D1 - 			Track Register		Track Register
D2 -			Sector Register		Sector Register
D3 - 			Data Register		Data Register

D4 - Drive select:

	bit 7 6 5 4 3 2 1 0
	    x x x x | | | |__ /DS0
	            | | |____ /DS1
	            | |______ /SIDE SEL
	            |________ /DDEN

     To enable signal, set correspondant bit to 1, as bits value are inverted by a 7406 chip.

     The WD1770 has two modes of operation according to the state /DDEN (Pin 26).
     When /DDEN=1, single density is selected. Set bit 3 0 to enable double density.

By mohai

Paladin (971)

mohai's picture

04-02-2011, 10:42

Some more info:

port			read			write

D0 - WD1770 control: 	Status Register		Command Register
D1 - 			Track Register		Track Register
D2 -			Sector Register		Sector Register
D3 - 			Data Register		Data Register

D4 - Miscelaneous:

		bit 7 6 5 4 3 2 1 0		bit 7 6 5 4 3 2 1 0
		    | | x x x x x x		    x x x x | | | |__ /DS0
		    | |______________ /IRQ	                     | | |____ /DS1
		    |________________ DRQ	                     | |______ /SIDE SEL
					                     |________ /DDEN


     Signals /IRQ, DRQ, are pins 27, 28 of WD1770. /IRQ is inverted by a 7406 chip.

     When writting to bits 0,1,2, set correspondant bit to 1 to activate, as bits value are inverted by a 7406 chip.

     The WD1770 has two modes of operation according to the state /DDEN (Pin 26).
     When /DDEN=1, single density is selected. Set bit 3 to 0 to enable double density.


* Ports D5-D7 are not used.

By mohai

Paladin (971)

mohai's picture

06-02-2011, 15:50

Correction:
Port D4 is used to read IRQ and DRQ status.
Port D5 is used to write DS0, DS1 , SIDE and DDEN dignals.

By flyguille

Prophet (3028)

flyguille's picture

06-02-2011, 21:34

D4 read & D4 write do you means... not D5

By mohai

Paladin (971)

mohai's picture

16-02-2011, 23:34

D4 read & D4 write do you means... not D5

Not really.
At first, i thought that D4 was used to both read and write (as Brazilian Microsol does) but, after editing diskrom, i found that port D5 was used to write and port D4 only to read.

I think i will have to re-check circuitry and make sure where every signal is located.

I have drawn schemes but not all of them. I just checked some connections and figured out that it was similar to Daewoo DPF-550, but this is not correct. It seems that Daewoo make some small changes in the boards, maybe to correct some bugs or make models incompatible... Question

By mohai

Paladin (971)

mohai's picture

29-04-2011, 10:02

Some more news about this drive:

I have been studying this interface and found out that port D5 is used to manage these extra signals (not D4, as i thought at first).

I looked at schemes from other models, but ATV is slightly different from them. Port D5 is used to set DS0, DS1 ... and bits used are 4-7.

More info to come ...

By Manuel

Ascended (18876)

Manuel's picture

18-06-2012, 21:15

Any idea whether the original Daewoo DPF-550 is port based, like the AVT, or memory based, like the Talent?

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