Help! black screen!!

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By ali6x944

Master (194)

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19-02-2019, 11:52

hopefully, I will test it tonight Running Naked in a Field of Flowers

By Alexey

Guardian (2117)

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19-02-2019, 13:29

This is ACQ series, so I am not sure whether it is TTL compatible. I never used these series, but had some issues with HC series when used instead of LS and HCT with other TTL compatible logic ICs.

By ali6x944

Master (194)

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19-02-2019, 14:33

I don't think it will negatively impact the performance, reading through the datasheet, the voltage thresholds are close to that of the LS series.
http://80.93.56.75/pdf/0/5/0/4/3/05043004.pdf
http://www.sjsu.edu/people/burford.furman/docs/me106/handout...
however, I do fear the low noise feature might be a bit of an over-kill for this application and may impact the test in unexpected ways, or maybe not IDK :-?

By ali6x944

Master (194)

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01-03-2019, 08:29

is there anything else I have to check?

By Alexey

Guardian (2117)

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01-03-2019, 19:43

Those saw-shaped signals have very shallow front. I am not sure they can be classified as TTL-compatible.

By ali6x944

Master (194)

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01-03-2019, 20:11

@ Alexey I had the same conserns, I think it is due to some bad chip or a powerload behavior creating that, however RetroTechie gave me an explanation:

Quote:

RetroTechie wrote:

Quote:

ali6x944 wrote:
the cpu's data line is [email protected]!#ed up to a certain degree, I suspect either a buffer is loading the data line so badly it is causing the horrible waveform or the cpu's data bus is dead.

Not necessarily! Periods where /MREQ and /RD are both low, is where memory is read (most likely instruction fetch from BIOS ROM). Your picture shows D0 low there, that is: a value of ???????0 binary is read. Looks okay - although D0 should read "1" for 1st instruction fetch from ROM (DI instruction) I think? May not mean much.
In between (where /MREQ goes low but /RD stays high) is the Z80's refresh cycle, where databus is left in hi-Z so you'd expect datalines returning high due to pull-up resistors on the databus. That happens relatively slow (like in an RC circuit), which is exactly what we're seeing. So this may be okay & normal behaviour. Edges should be steep only where data outputs of some IC go active.

@Alexey,@RetroTechie what is the problem here?
a)is the CPU is damaged?
b)is the support circutry damaged -mainly the tristate buffers-?
c)is the VDB damaged?
d)is it a power supply issue -mainly in the motherboard-?
e)is it a ram issue?

I would suspect a,or b, or d to be potential targets, but this is my first major repair so I'm not really sure Question

By ali6x944

Master (194)

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04-03-2019, 12:12

any ideas? or further test?

By Alexey

Guardian (2117)

Alexey's picture

04-03-2019, 15:26

I think something is pulling those signals down. But as most of the chips are sitting on the data bus, it's hard to say which one is faulty. What I would do (and I successfully tested this approach some time ago to fix the Maxiol controller) is to test the input and output pins of every logic IC with an oscilloscope or a signal logger and watch for anomalies in the input and output signals:

1. Incorrect output: too low voltage, non-TTL waveform, no output or wrong output (for example signal inversion does not happen while it should)
2. Incorrect input: loo low voltage, non-TTL form, no output -> trace to other's chip's output and test that chip

On RAM and VRAM chips you need to test the Data Out pins and see if the output has an anomaly. Check for INT signal on Z80 - with faulty VDP or VRAM the BIOS will not boot. If you give up with this machine, I am ready to buy it or trade it for a working one (similar Yamaha).

By ali6x944

Master (194)

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05-03-2019, 07:19

@Alexey, I will check the data bus as you advised, quick question thou; do I need to compensate for the different TTL families? or can I ignore the normal and the ALS variants and just treat them as if they were LS type?
dose that also extend to devices with CMOS output/input?

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