Quickie on the WD2793 disk interfaces: do we know anything about the logic applied for generating HLT?
The 2793 will signal the HLD output when it wants the heads loaded. External logic must signal the HLT input once heads are loaded. Reads and writes will wait until they are told that heads are loaded.
For context, the other branch of the WD family, that runs to the 177x, doesn't provide these signals. It instead provides a motor on output and waits for an appropriate quantity of index holes after motor on to decide that the disk is up to speed. It then proceeds. No additional external circuitry necessary. So on floppy systems with a 2793-type chip, HLD and HLT are in lieu of motor control.
The other machine that I'm aware of that uses a 2793-compatible chip is the Oric's Microdisc. Its logic is that HLD active starts the disk motor and after a fixed-duration delay HLT is signalled. HLD inactive instantly deactivates both.
The MSX has a separate, explicit motor which the programmer has to invest the effort to manage. So I can think of at least two ways in which HLD/HLT might be implemented on an MSX:
- the one is directly wired to the other; HLD active means HLT active, and HLD inactive means HLT inactive;
- HLT is active exactly when both HLD and the disk motors are active.
Is either of those a correct guess? Do we even know the real answer?

