V9990 - Discrepency between emulation and PowerGraph Lite

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By PingPong

Prophet (3123)

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22-04-2018, 17:02

Grauw wrote:

Manuel: Hopefully my theory on why this occurs is a workable one for a fix Wink.

I was talking about the issue with Keith over Twitter, and because of this theory I suggested he try 8-pixel offsets, which indeed solved the issue, so to me that’s gotta be it Smile.

About the write mask, as the VDP commands always operates on 16 bits at once, the mask is just a logic operation on those. For the 0 bits it selects DC rather than WC. A mask is used internally to deal with unaligned pixel coordinates, friendly of them to expose the functionality to the end user as well.

I have to say the V9938 often gets criticised here for its slow command engine implementation, after considering a bit more deeply the V9990 implementation, Yamaha really stepped up their game there.

p.s. So as the PC-Engine advertised being a “16-bit computer” due to having a 16-bit VDP even though the CPU was 8-bits, I guess with the V9990 our MSX is equally 16-bit, certainly if you add the R800! Big smile

does this mean that on v9990 it is not possible to scroll the entire screen horizontally by brute force at 1px steps?

By hit9918

Prophet (2772)

hit9918's picture

22-04-2018, 17:34

Quote:

does this mean that on v9990 it is not possible to scroll the entire screen horizontally by brute force at 1px steps?

good question.
maybe everything goes well when you run the blitter in the right direction

By hit9918

Prophet (2772)

hit9918's picture

22-04-2018, 19:03

Quote:

For high performance, I think it’s pipelined to read the next unit of pixel data before it writes the previous result

when the source gets shifted by 0..3 nibbles
some pipelining is inherent to it
there must be some shift register bits as buffer

By PingPong

Prophet (3123)

PingPong's picture

22-04-2018, 19:07

hit9918 wrote:
Quote:

does this mean that on v9990 it is not possible to scroll the entire screen horizontally by brute force at 1px steps?

good question.
maybe everything goes well when you run the blitter in the right direction

someone should verify on real hw

By hit9918

Prophet (2772)

hit9918's picture

22-04-2018, 19:22

the docs sound like in P1 mode the blitter copies in layer A and layer B simultaneously. usualy you block one copy with write mask.
the shift register pathes got to be a bit different than in other modi.

By Grauw

Enlighted (7360)

Grauw's picture

22-04-2018, 21:02

PingPong wrote:

does this mean that on v9990 it is not possible to scroll the entire screen horizontally by brute force at 1px steps?

There is no such restriction on copies. I think hit9918 is spot on saying “some pipelining is inherent to it”, that sounds like a good reason to have a buffer step between reading and writing.

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