One chip MSX improvement project

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By mygodess

Champion (275)

mygodess's picture

16-05-2013, 07:26

I don't know why LED 9 is not turning on on Zemmix Neo.
(The LED itself is just OK and it is turned on when I downloaded old version firmware like 1.0.)
Anyways, the LEDs on Zemmix Neo are high-intensity ones cause it could be very hard to use
soft regulation. (Brightness could be changed but color itself may not changed with soft regulation.)
If there is some opinion or suggestion then just tell me. I could help you if there is some ways to change.

By KdL

Paragon (1430)

KdL's picture

16-05-2013, 13:31

The setup of luminance is possible with soft regulation (via VHDL in PLD, I intend)... it's a my creation, a fix of ocm-pld from v2 and later!

The LED9 is OFF because OCM-PLD 3.x have the cpu 5.37MHz freq over power led (OFF by default).

If you see the light of LED9 (F12 to enable) is not the same of other LEDs. It is not because there is my soft control in action. Note: LED1-8 and Power have differents luma timer in OCM.

OCM-PLD RC3 variant of Zemmix Neo is not a final release but an RC (=beta)..... will be to update!

By mygodess

Champion (275)

mygodess's picture

16-05-2013, 15:21

Oh, OK. I understand Smile I'll wait till new firmware comes.
I'll change the Zemmix Neo Logo whenever you release the new version. (for other Zemmix Neo Users.)

By KdL

Paragon (1430)

KdL's picture

16-05-2013, 16:20

Yes, I agree! Nishi Nishi Nishi

By Ace

Resident (53)

Ace's picture

16-05-2013, 17:01

Forgot to ask this to Caro:

caro wrote:

The level of each of the five channels can be set independently of the four bit code level recorded in the registers for each channel.

Exactly what part of the code controls the volume level of the SCC's 5 channels?

By x-nen Aivalahostia

Paragon (1473)

x-nen Aivalahostia's picture

16-05-2013, 17:03

@Caro: i install the latest .pof file (de1_pof_150513) on my DE1, thanks again for your exellent work, now i can configure separate volum for scc, opl and psg!! i like it!!, is there any new faeture on last core?

Thanks!!

By caro

Champion (512)

caro's picture

16-05-2013, 18:05

Ace wrote:

Exactly what part of the code controls the volume level of the SCC's 5 channels?

All five channels is equal and each level adjusted equally.
To test can run the program scc2test.bas:

10 REM scc2test.bas
20 IF PEEK(&HF677)<>&HC0 THEN POKE &HF677,&HC0: POKE &HC000,0:RUN"scc2test.bas"
30 OUT &HA8,&B11010000: POKE &H9000,&H3F: POKE &H9800,&H5F: IF PEEK(&H9800)=&H5F THEN S=1: GOTO 60
40 OUT &HA8,&B11100000: POKE &H9000,&H3F: POKE &H9800,&H5F: IF PEEK(&H9800)=&H5F THEN S=2: GOTO 60
50 PRINT"SCC not found": GOTO 260
60 PRINT"SCC found in slot ";S
70 PI=4*ATN(1)
80 FOR N=0 TO 31
90 POKE &H9800+N,128+127*SIN(N*PI/16)XOR128
100 POKE &H9820+N,128+127*SIN(N*PI/16)XOR128
110 POKE &H9840+N,128+127*SIN(N*PI/16)XOR128
120 POKE &H9860+N,128+127*SIN(N*PI/16)XOR128
130 NEXT N
140 POKE &H988F,&B00000000
150 POKE&H988A,15: POKE&H988B,15: POKE &H988C,15: POKE &H988D,15: POKE &H988E,15
160 POKE &H9880,255:POKE &H9881,1
170 POKE &H9882,255:POKE &H9883,0
180 POKE &H9884,127:POKE &H9885,0
190 POKE &H9886, 63:POKE &H9887,0
200 POKE &H9888, 31:POKE &H9889,0
210 PRINT "Chanel=0..31:";:INPUT CH
220 IF CH>31 THEN GOTO 250
230 POKE &H988F,CH
240 GOTO 210
250 POKE &H988F,&B00000000
260 END

Entering numbers 1,2,4,8,16 - meet the inclusion of channels from 1 to 5.

By Ace

Resident (53)

Ace's picture

16-05-2013, 19:39

I meant in the scc_wave.vhd file. Where is the volume adjustment for the individual SCC channels in there?

By Ace

Resident (53)

Ace's picture

17-05-2013, 02:09

Okay Caro, please explain something to me. Why does the TV out never work correctly on my DE0? I even went so far as to alter the source code to have a second blue video output on the GPIO pins so I can have a 6-bit R2R ladder for Composite like the 1ChipMSX, but the only video I get is like if I were to use the Composite out of the VGA connector: a monochrome picture with spinning red and green lines. I can't figure out what the problem is.

By caro

Champion (512)

caro's picture

17-05-2013, 06:15

It is not the bit RGB-signal and the clock frequency of the computer.
In the OCM (all models in the MSX) using a generator with a frequency of 21.477270 MHz. 6 is obtained by dividing the frequency of 3.579545 MHz which is used to operate the module vencode.vhd (RGB to NTSC video encoder).
In DE0 (and DE1) clock frequency is generated from the frequency of 50 MHz.
50.000000 * 3/7 = 21.428571 / 6 = 3.571428 MHz
As a result, NTSC video encoder does not work properly.
To solve this problem, you can use an external oscillator 21.477270 MHz

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