IO, a new MSX1 demo by Logon System

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By MäSäXi

Paragon (1884)

MäSäXi's picture

17-03-2015, 23:06

Overflow wrote:

I did not and do not intend to follow rules when coding demo-fx. My aim was and still is: having fun when retro-coding, trying to use hardware in a non-standard way to display impossible fx at screen.

Thank you for that! Smile

By hit9918

Prophet (2866)

hit9918's picture

17-03-2015, 23:06

Yes, the bios address 6 sucks because it asks adding a whole new bios.
Better is to just check the alternative port 0x88 for VDP.
And then set up the VDP without bios so it can be bigger than bios version.
These two things make it work with a naked VDP board or with internal replacements without bios upgrade ado.

By flyguille

Prophet (3029)

flyguille's picture

17-03-2015, 23:14

hit9918 wrote:

Yes, the bios address 6 sucks because it asks adding a whole new bios.
Better is to just check the alternative port 0x88 for VDP.
And then set up the VDP without bios so it can be bigger than bios version.
These two things make it work with a naked VDP board or with internal replacements without bios upgrade ado.

but, then, the check is not standard procedure. Tongue

By hit9918

Prophet (2866)

hit9918's picture

17-03-2015, 23:22

The demo doesn't have issues with "follow rules" but is touching new grounds.
Port retargeting and VDP differences are separate stories.

"the standard" is written in no book and out of MSX1 VDP clone mystics crystalized two clear TMS and one clearly silly Toshiba.
The MSX2 has the 9938 standard, one single chip. And now this demo gives some big surprise with a 8280 having halve a cycle more per line, how does the machine do DAT.
Maybe the issue also is a hint to MSX3 makers with 9990 superimpose things.
It is expecialy funny because when the VDP would take halve a cycle more, it would take 0.75 cycles more on the cpu.

By flyguille

Prophet (3029)

flyguille's picture

17-03-2015, 23:25

hit9918 wrote:

The demo doesn't have issues with "follow rules" but is touching new grounds.
Port retargeting and VDP differences are separate stories.

"the standard" is written in no book and out of MSX1 VDP clone mystics crystalized two clear TMS and one clearly silly Toshiba.
The MSX2 has the 9938 standard, one single chip. And now this demo gives some big surprise with a 8280 having halve a cycle more per line, how does the machine do DAT.
Maybe the issue also is a hint to MSX3 makers with 9990 superimpose things.
It is expecialy funny because when the VDP would take halve a cycle more, it would take 0.75 cycles more on the cpu.

just guessing, wait states ?

By hit9918

Prophet (2866)

hit9918's picture

17-03-2015, 23:41

@flyguille,
one could extend things to
if peek(6) is not 0x98, then use that one,
else go try the 0x88 alternative
else use 0x98
this way still things can be bios-retargeted to any port.
and additionaly 0x88 alternatives work without needing bios butchering.

but then this is assuming that every MSX has 0x98 internal VDP anyways.
on MSX with different internal port, told in bios, the retargeting to a plugged naked port 0x88 cartridge doesnt work with the above algorithm.
Still it doesnt work worse than the old plain peek(6) way.

By hit9918

Prophet (2866)

hit9918's picture

17-03-2015, 23:37

what kind of wait could it be that makes exactly 0.5 cpu cycles per scanline.

By Grauw

Ascended (8377)

Grauw's picture

18-03-2015, 00:20

The cycle accurate timing discussion — very interesting to see those differences between machines (re. genlock as well), and what kind of compatibility you can achieve despite it. I would imagine that with 2 separate clocks, the deviations can differ on a machine-by-machine basis because each crystal has some some error that is differs for each individual, so the one Canon V-20 would have a completely different deviation than another V-20.

I did some cycle-accurate timing myself not too long ago, but there I was running the Z80 in sync with the PSG (to produce a pulse wave), and as those do usually run on the same clock, there are probably a lot less issues with that Smile.

The VDP I/O port vs BIOS discussion — boring the crap out of me Wink. Nothing new is said, just dogma.

Though, your stories about lengthy compatibility testing and tuning do make a good case to be cautious of straying too far off the common path… but then your demo makes a good case for the opposite ;p.

By hit9918

Prophet (2866)

hit9918's picture

18-03-2015, 00:29

With frequency register pokes things nicely are counted on AY, the cpu can jitter and drift some % in Mhz.
By the way which pacs or OPLs have timer interrupt?

By Grauw

Ascended (8377)

Grauw's picture

18-03-2015, 09:15

hit9918 wrote:

With frequency register pokes things nicely are counted on AY, the cpu can jitter and drift some % in Mhz.

I don’t think so...? It would be pretty bad if the Z80 would "jitter", and also, I’ve not observed it.

Quote:

By the way which pacs or OPLs have timer interrupt?

MSX-AUDIO through OPL4. Also Yamaha SFG-01/05, as well as various MIDI interfaces. Note that the OPL4 and MIDI interface ones are the only truly reliable timers, as they have their own independent clock crystal.

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