MSX2+ Turbo 7Mhz PSG Sound Clock Fix Testing

Par Protoman

Resident (44)

Portrait de Protoman

14-11-2016, 10:00

Hello! I've been trying to figure out how to fix the PSG and internal FM sound on MSX2+ model HB-F1XV with the 7Mhz turbo installed, but I'm having a lot of trouble :/ I also upgraded the memory to 512K SRAM (I followed the SRAM guide from Tabajara Labs) and I have SRAM pin 22 (/CE) wired to the S1985 pin 53 (/SLT3-3.0). Here's what I tried so far:

Test 1) Installed a Z84C0010PEC Z80 10Mhz with the 7Mhz turbo circuit, but I'm having the blank screen/ freezing issue when switching the turbo on after wiring the VDP 3.58Mhz CLK signal directly to pin 30 of the S1985, after lifting the pin from the board trace.

Test 2) With the VDP CLK signal still going to pin 30 of the S1985, I tried swapping the SRAM pin 22 (/CE) from S1985 pin 53 (/SLT3-3.0) to pin 56 (/SLT33), according to user "Colemu" who appears to have fixed the PSG audio issue with his HB-F1XD MSX2 which he upgraded to an MSX2+.


At first this didn't work, but I remembered that my SRAM was wired up to CAS. I figured it wouldn't work in DRAM config, do wired my memory up to SLT33. It worked like a dream!

Test 3) I replaced the S1985 CLK signal to the 7Mhz turbo CLK signal, which allows the computer to function correctly at 3.58Mhz and 7Mhz speeds (with distorted PSG and FM sound). I then removed pin 8 (CLK) of the YM2413 from the 7Mhz CLK signal of the turbo board, and connected the YM2413 pin 8 to the VDP pin pin (3.58Mhz CLK). Here is where things get really strange!

At first, I tested a converted PSG to FM sound game "Ys" using the NandemoFM conversion from user "Tiny Yarou". The FM sound worked perfectly with the turbo enabled at 7Mhz! However, the PSG sound effects were still distorted (of course). BUT, when I tried various commercial games released with FM sound, like "Laydock 2 - Last Attack" and "Ashguine 2", the FM sound is not detected and the games play in only PSG audio. So even when running at 3.58Mhz non turbo mode, with the YM2413 connected SEPARATELY to the VDP 3.58MHz CLK signal, these commercial games DO NOT DETECT the internal FM sound chip! oO If I plug in an FM PAC to an external slot, the FM sound works, although the turbo causes distorted sound on the FM as well as PSG effects. When it comes to the "Ys" test using FM sound, the FM PAC causes the sound to become distorted (and lower volume level) when I enable turbo mode, and the audio level becomes louder as though the FM PAC signal is taking over instead of the internal FM sound. FM Sound Testing with Turbo.


I actually found a different diagram showing a 512K SRAM memory chip wired to an S-1985 from the HBF1-XV which shows DIFFERENT wiring to the /OE and /WE pins of the SRAM. 512K SRAM Japanese

With the Tabajara Labs information, the SRAM pin 24 (/OE) is wired to the Z80 pin 21 (/WR) and SRAM pin 29 (/WE) is wired to the Z80 pin 22 (/RD). However, that Japanese site shows the SRAM pin 24 (/OE) wired to the DRAM socket pin 1 (/OE) and the SRAM pin 29 (/WE) wired to the DRAM socket pin 4 (/W). Is this the so-called "CAS mode"? I thought SRAM can't be wired as DRAM with CAS strobe signals...?

Test 4) Remove SRAM pins 24 and 29 and connect to the DRAM socket pins 1 and 4. This causes the machine to NOT BOOT at all. So it appears that I indeed have the SRAM chip wired correctly when pins 24 and 29 go to the Z80 pins 21 and 22.

Test 5) I removed the Turbo 7Mhz diode interrupt signal from the Z80 pin 20 (IO RQ) and tested running "Vampire Killer" with turbo enabled. This results in corrupted graphics across the screen as seen in my video link. BUT, the PSG sound DOES NOT appear to be distorted! HB-F1XV Turbo without IO RQ test:

How is it possible to get the system to boot with PSG at 3.58Mhz and turbo enabled?? I think it will be very beneficial for anyone with an MSX2 or MSX2+ to have this useful information for reference on this site :)

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Par jltursan

Prophet (2425)

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14-11-2016, 19:37

I'm not an expert; but I can barely remember something related to the installation of a new crystal providing the old freq to the audio, not reusing the one present in the mainboard. Just an idea...

Par Protoman

Resident (44)

Portrait de Protoman

15-11-2016, 07:32

Hello jltursan! Thank you for the reply! I actually first tried the VDP CLK signal, but last night I installed a new 3.58MHz crystal oscillator which outputs a TTL compatible clock signal directly to the S-1985 MSX Engine pin 30 (CLK) input. The same issue occurs when I try to enable the 7MHz turbo.

Par l_oliveira

Hero (531)

Portrait de l_oliveira

17-11-2016, 05:26

CPU clock is used as one of the inputs on the DRAM control circuitry (for timing reasons). Overclocking the CPU will require that you crank up the clock on the circuitry which generate the DRAM RAS/CAS signals, which in case of S1985 are part of the IC in question.

Hence why you can't have it run at 3.57Mhz (so PSG sounds right) and use DRAM with the new overclocked CPU. SRAM bypasses the issue as it doesn't require the DRAM control circuitry be used to work properly.

MSX computers with turbo from factory solve this by having DRAM control logic be on the gate array IC instead of on the MSX engine IC. MSX Engine IC DRAM control logic may be left unused.

Par Protoman

Resident (44)

Portrait de Protoman

18-11-2016, 10:28

Hello l_oliveira! Thanks for the info. I understand the issue with the DRAM RAS/ CAS timing signals becoming out of sync when the CPU is overclocked, but I'm using SRAM in my MSX2+ which doesn't have any refresh.

I've run some thorough tests over the past two days, and so far I've found the 3 POSSIBLE configurations with my HB-F1XV that allows for running with a 3.58Mhz CLK signal to the S1985 for non-distorted PSG sound (although one configuration is UNSTABLE).

WORKING Solution#1:
I rewired the turbo circuit to input the 14.316MHz clock crystal source on the turbo board, ran it through the 1/2 frequency divider on the Z0858110PSC clock generator IC and I get a constant 7.158Mhz CLK signal (pin 13 of clock gen IC) which is in sync with the Z80 turbo CLK signal (pin 6 of clock gen IC). I then ran that 7Mhz clock to the S1985 (pin 30), and onboard Yamaha FM sound chip YM2413 (pin 8).

In this configuration, the PSG audio and FM audio are not distorted, even at turbo speeds! BUT, the audio is running at a pitch increase from the doubled clock. For further testing, I wired a toggle switch to manually select the Z80 turbo enabled clock signal and the constant 7.158Mhz clock signal from the turbo board. In one position, you can hear PSG distortion due to clock throttling from VDP interrupts. In the other switch position, there is no distortion, but the pitch is increased. You can see some tests in the following videos.

[FM sound Test 4 with constant 7Mhz CLK to MSX-ENGINE II]

[FM sound Test 6 with switchable 7Mhz CLK / turbo interrupt CLK to MSX-ENGINE II]

[PSG sound Test 7 with circuit board overview ]

Test Solution#2: <--------UNSTABLE
In this configuration, I added a TTL logic 74LS74 D-type positive-edge-triggered flip-flop to create a 1/2 frequency divider and take the constant 7.158Mhz from the turbo circuit (pin 13) and output as 3.58Mhz. I connected this new, constant 3.58Mhz CLK signal to the S1985 (pin 30). When the turbo is disabled, the computer WILL NOT boot at all and remains with a blank, black screen. When the turbo is enabled, I can SOMETIMES get the computer to boot. Other times, the screen will remain black and nothing happens. If I cycle the main power switch on and off a few times, I can sometimes get the computer to boot at turbo speeds. In this state, I had the game Gradius 2 running in demo mode for about 20 minutes before it decided to freeze.

If I switch the turbo off after the MSX2+ is already running a game, the computer SOMETIMES freezes. There are also situations when the computer continues running after turning off the turbo, but then the system freezes when re-loading a level after losing a life in Gradius 2 (so the cartridge ROM is being accessed?).

[MSX2+ Test 8 - Turbo testing with CLK divider chip to S1985 - Boot issues]

[MSX2+ Test 9 - Turbo with FM sound, freezing, not rebooting ]

[MSX2+ Test 10 - turbo testing PSG audio fixed ]

WORKING Solution #3:
Same configuration as "Working Solution#1", except adding a double-pole, double-throw switch to simultaneously switch between A) Non-turbo Z80 CLK speed(pin 6) WITH Non-turbo Z80 CLK signal to S1985 (pin 30) and B) Turbo Z80 CLK speed WITH constant 7.158Mhz CLK signal to S1985 (pin 30).

By using this combined switching method, the non turbo PSG and FM sound will be played at the correct pitch when the Z80 is running in non turbo mode. When the Z80 is switched to turbo mode, the PSG and FM sound will have a pitch increase, but will not be distorted AND the HB-F1XV computer is STABLE and appears to be RELIABLE!! :)

Par Protoman

Resident (44)

Portrait de Protoman

18-11-2016, 13:39


It seems that the computer will USUALLY boot with the 3.58Mhz constant CLK signal from the 74LS74 chip added in the above "Test Solution#2", when running turbo mode IF I power off the system and wait a few seconds before powering back on. In every situation where the machine boots successfully, the internal floppy drive makes an initialization sound.

What I'm thinking is that the HB-F1XV with this particular 7Mhz turbo circuit is very sensitive to the clock signals when the S1985 chip is receiving a SLOWER and separate clock than the Z80 (even when that slower clock is synchronized since it is generated from the single master clock crystal of 14.316Mhz).


Theory 1: I CAN get the computer to boot with the S1985 at 3.58Mhz, depending on how I cycle the power switch. It seems to be that the 74LS74A output is at a random state when cold powered up. When cycling the power and waiting a short few seconds (or cycling again a couple times), the Z80 clock generator circuit and 74LS74A become synchronized whereby the positive pulse of the clock signals are in phase. (I don't have my oscilloscope available to confirm this at the moment...)

[MSX2+ Test 12 - turbo with PSG audio 3.58 / 7.158MHz switching]


Theory 2: I have been running the computer at turbo speeds, with the S1985 at 3.58Mhz for over 1.5hrs without any stability issues, while cycling through the introduction demo of Metal Gear 2: Solid Snake, running from the ESE-SCC cart I made using an AS6C4008-55PCM SRAM chip at 55ns. The computer also runs stable in turbo mode with the Maxiol Sunrise clone CF IDE interface when using disk images loaded from the CF. The ONLY instances so far when I had the system randomly freeze while in turbo mode with this CLK signal was with 1) Gradius 2 with the smooth scroll patch that I burned to a one time programmable AT27C020-90PU EPROM at 90ns, and 2) Tetris which is an FM sound game and is an original cartridge with mask ROM. Maybe it's possible that the 90ns chips (and mask ROM) are too slow for the turbo synchronization when running the two clock speeds simultaneously?....

[MSX2+ Test 16 - Turbo testing on / off fixed PSG & SCC sound ]

Par RetroTechie

Paragon (1563)

Portrait de RetroTechie

18-11-2016, 14:47

@Protoman: as a HB-F1XV schematic seems to be MIA, did you ever draw up a circuit diagram of how clock signal(s) are routed between parts in this machine? For example: isn't there some speed-control built into this machine that allows slowing down games using a slider?

I've got a Sony HB-F1 mk.II which has something like that, and iirc it's controlled through some custom gate array that messes with the Z80 clock signal somehow. Maybe something similar is going on here, and you've overlooked that? Even if Z80 gets its clock elsewhere, maybe that custom chip still needs 'CPU clock' signal in order to not cause problems?

Protoman wrote:

So even when running at 3.58Mhz non turbo mode, with the YM2413 connected SEPARATELY to the VDP 3.58MHz CLK signal, these commercial games DO NOT DETECT the internal FM sound chip!

That's weird to say the least! oO Afaik the YM2413 is write-only, so it's not possible to actually detect the chip. 'Detection' works by searching for a ROM that normally goes with the FM chip. How could THAT possibly be affected when you change the chips' clock source?

Btw, checking the YM2413's datasheet: there's also a clock OUT on that chip. So it's possible to use an YM2413 as clock buffer. Just to be sure I'd check that output (XOUT = pin 9 on the 18p DIP) isn't connected to anything. Or if so, where it goes.

Par Protoman

Resident (44)

Portrait de Protoman

19-11-2016, 15:38

Hello RetroTechie! Smile Thanks for the ideas! Big smile

I'm still working on making a diagram from my experiments. And somehow I completely forgot about the speed-controller slider wiring when thinking about the CLK issues! Tongue You're right, those additional logic chips may very well be the reason for the strange CLK interference I've been experiencing!

I'll see if I can check the YM2413 again, but from the photos I took of the circuit board, it looks like there may be a resistive trace (blue color) connecting to pin 9 which would be the CLK OUT. I also checked the YM2413 application manual from Yamaha and it looks like the purpose of the CLK IN and OUT are to allow for a clock crystal to be directly wired across both pins for frequency reference, if the FM chip isn't using an external CLK signal. For reference, in the MSX2+ Panasonic FS-A1WX schematics which also has an FM chip, it looks like pin 9 CLK OUT is not connected, and only the 3.58Mhz CLK IN (pin 8) is connected to the system's CLK signal.

I'll update this post when I have some more information! Wink

Par l_oliveira

Hero (531)

Portrait de l_oliveira

03-12-2016, 20:52

YM2413 can drive it's own clock oscillator. All you need is a pair of identical ceramic capacitors (between 15 and 30nf) and a 3.57Mhz (NTSC color carrier frequency) ceramic resonator or crystal. Connect the two X pins (XIN and XOUT) to one leg of the capacitors and the other leg of each capacitor to the GND. Then connect each of the two pins of the crystal to one of the YM2413 pins. (Exactly how it's done with the V9938 crystal)

It will oscillate and drive the YM2413 without any worries about the host computer clock.