New FPGA-based MSX

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Par George.rm

Supporter (15)

Portrait de George.rm

17-04-2018, 23:21

Zett, current estimates are at R$700-800 (Brazilian Reais, BRL), no idea about shipping to Europe.

Hardwaremaker, there is no discrete logic on the board save for the dual inverter gate used to run the oscillator

Par Rataplan

Master (253)

Portrait de Rataplan

17-04-2018, 23:56

Nice work, slick pcb! Stupid question maybe, why is MSX2 in the MSX2 compatible logo reversed?

Par George.rm

Supporter (15)

Portrait de George.rm

18-04-2018, 05:29

I didn't want it to officially say MSX on the board itself, as
1) it technically isn't fully compliant to the standard (but close)
2) trademark ownership is cloudy, but definitely not mine, nor am I licensed to use it for commercial purposes, so...

Par hardwaremaker

Master (239)

Portrait de hardwaremaker

18-04-2018, 10:47

George.rm wrote:

Zett, current estimates are at R$700-800 (Brazilian Reais, BRL), no idea about shipping to Europe.

Hardwaremaker, there is no discrete logic on the board save for the dual inverter gate used to run the oscillator

If the components that I asked for, doesn't present in the board. Are they implemented in the FPGA? If this is so, you can't write the OCM firmware directly.

Par RetroTechie

Paragon (1563)

Portrait de RetroTechie

18-04-2018, 17:30

Very nice work indeed! Cool Smile

George.rm wrote:

It will be compatible with KdL's OCM-PLD.

Do you mean the same FPGA pins are used for same function? If so: doesn't that complicate board routing a lot? If not (re-compile of OCM sources needed), then not much of an issue to re-arrange some functions. Like FPGA pin use, or other items where desired.

gdx wrote:

If you can also improve the sound mixing, do not hesitate!

Better yet: include a small 2-channel A/D converter, put cartridge slot audio signals in there with minimum filtering on the input, and do mixing in the FPGA logic. That way it's easier to fix/enhance mixing later. Or make it programmable through some I/O port, provide a hotkey or whatever.

Par hardwaremaker

Master (239)

Portrait de hardwaremaker

18-04-2018, 18:13

OK, sorry, the OCM don't uses the 74HCXX IC's. Only the Zemmix uses them.

Par zett

Hero (608)

Portrait de zett

19-04-2018, 10:40

that is not a bad price for a board like that. what fpga do you use on it? is it the same as all befor or is it a better one? becourse of the possible future?

Par Grauw

Ascended (10174)

Portrait de Grauw

19-04-2018, 12:14

George.rm wrote:

The first revision uses an EP1C12, but this is quite probably gonna change for future versions.

Par George.rm

Supporter (15)

Portrait de George.rm

19-04-2018, 22:09

In time: BBcode isn't working properly here, so sorry for the sloppilly-written replies.

RetroTechie, yes, pin functions are a 100% duplicate the ones in the OCM for the current version. This'll change if I move to another FPGA, and I'll pass the changes to KdL so he can merge them into the code, should the project ever go this far. As for the routing, it didn't pose a problem. All was done by hand with no autorouting steps, from the component footprints up.

As for the variable mixing thru an A/D, the OCM code already mixes the sound sources implemented in VHDL variably, I guess adding an A/D could be done. My only worry is the amount of pins consumed. I didn't wanna start multiplexing stuff, to be honest.

Par RetroTechie

Paragon (1563)

Portrait de RetroTechie

19-04-2018, 22:46

George.rm wrote:

I guess adding an A/D could be done. My only worry is the amount of pins consumed.

There must be some A/D converters with a serial output. Maybe using a bus like I2C or similar. Which uses like what, 2 signal lines or so? Say you find a 2-channel A/D chip with 16-bit resolution (not that you need that much, really Tongue ), and those channels are sampled at 'CD quality' 44.1 kHz, that gives a 1.4 Mbit/s serial stream (give or take some overhead). Kind of like an MSX-Audio or OPL4 external DAC but in reverse direction. Should be easy to handle by an FPGA, and if resolution/sampling rate is lowered, bitstream could even run at lower rate.

I could do a search for suitable IC's if anyone wants to have a go at that. Main advantage would be that it moves (some) difficulties with analog I/O circuitry into the math / FPGA coding domain where it -most likely- is easier to handle.

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