Uncovering the R800

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Par thegeps

Champion (278)

Portrait de thegeps

06-05-2019, 15:21

If you still have those Italian translations I can translate them in english (I'm italian, artrag is italian too) so...
You know actually I'm developing only for MSX1 butbig help is needed, well, I'm here Big smile

Par Takamichi

Champion (261)

Portrait de Takamichi

06-05-2019, 17:10

Okay here it is. Note I initially used the Google translation then fixed here and there to write this, and it must be full of errors. Obviously, there is a figure with numbers next to this sentence.

E un oggetto è per fornire una unità di elaborazione centrale per rimuovere lo spreco di tempo di elaborazione quando si esegue un aggiornamento di memoria o Scopo funzionamento DMA, per consentire il funzionamento estremamente veloce così.
Si è deciso di realizzare un circuito latch 1-4 per aggancio autonomamente dati di controllo di memoria COSTITUZIONE dati di istruzioni, dati DMA, e interrompere l'elaborazione dei dati, ed emette selezionato dal selettore 5 e uscita dei dati dei circuiti latch loro. I criteri di selezione del selettore 5 è uscita dal regolatore priorità 9 sulla base del loro priorità e vari segnali di controllo. Come risultato, ho accorciato il tempo da trasmettere al decodificatore di istruzioni passaggio 6 e il ALU10 come ciascun dato.

Par thegeps

Champion (278)

Portrait de thegeps

06-05-2019, 20:06

LoL, full of errors isn't enough! Big smile
I will try, anyway:

This object provide the cpu to remove elaboration time delay when performing a memory refresh or for DMA purpose, to let an extremely fast operation.
So we decided to realize a circuit latch 1-4 to indipendently hook memory control, CONSTITUTION instructions data, DMA data, and to stop data elaboration, and selected issues from 5 selector and data exit from their latch (I REAALY don't know if what I'm writing has some sense...) Selection criterion of selector 5 is out of priority regulator 9 by their priority and various control signals. As result, I've shorten the sending time of instruction passage 6 and ALU10 like each data.

I hope it will help (I tried to translate as best as I can but it's an unknown argument to me...)

Par Takamichi

Champion (261)

Portrait de Takamichi

07-05-2019, 03:17

Thank you for "deciphering". The first paragraph probably simply meant to say "my idea really accelerates the processing".
My faint memory of the second paragraph was I tried to write, "Latch circuits 1 to 4 hook up memory control data structure of instruction, DMA and interruption data processing, and then the applicable data selected by the selector 5 is emitted and the latch circuit datas are outputted accordingly. The selection criteria of the selector 5 is outputted from the priority regulator 9 based on their priority and various control signals. As the result, the time taken for the transmission of each data to the step instruction decoder 6 and ALU 10 is shortened."
Of course this alone doesn't offer any meaningful information.

The trouble is that the URL for the patents I placed earlier aren't working anymore. The database is back online so I tried to search again by the inventor's name KISHIOKA Kazuya (岸岡和也) but at this point haven't managed to dig out the document I saw that was titled like "how to accelerate the CPU". The nearest I could find was;
https://www.j-platpat.inpit.go.jp/c1800/PU/JP-H04-102145/3C4...
The title of the patent is "Data control device". If you hit a button saying "PDF", after some time a link appears in the bottom right of the page and if you hit it, the entire document PDF appears in the separate window. It does contain words like "latch", "selector" and "DRAM" but doesn't say anything about DMA or ALU. It's a raw scan and is slanted so Google translation doesn't work. But least you can view the schematics. :)

Par ricbit

Champion (438)

Portrait de ricbit

07-05-2019, 04:47

This patent site is amazing, thanks Takamichi. Searching for msx I got lots of nice results, the image below is from a patent for a saving and loading interface for msx personal computers. I saw there the patent for the bee card as well. Maybe we can find some R800-related patents indeed.

Par Piter Punk

Master (203)

Portrait de Piter Punk

07-05-2019, 06:47

ricbit wrote:

This patent site is amazing, thanks Takamichi. Searching for msx I got lots of nice results, the image below is from a patent for a saving and loading interface for msx personal computers. I saw there the patent for the bee card as well. Maybe we can find some R800-related patents indeed.

This is the Hitachi MB-H50. It have blinking lights for CMT Load, Save and when playing music.

Par Manuel

Ascended (15819)

Portrait de Manuel

07-05-2019, 07:52

Does someonee know how that is implemented electrically? I guess that's all analog circuitry.

Par Takamichi

Champion (261)

Portrait de Takamichi

07-05-2019, 09:12

ricbit: Glad you are still in the scene. The problem with this site is too slow and keeps loading forever so I found another patent search site https://patentfield.com/
Here I found what I was looking for https://patentfield.com/patents/JP19910204502#biblio
There is a language selection button on the upper right but it's an automatic translation that returns nonsense, so here goes my Japanese -> English translation.

[Purpose] The purpose is to eliminate the excess processing time when executing a DMA operation or memory refresh, and to provide central processing device that by doing so, enables very fast operation.

[Configuration] Latch circuits 1 through 4 of which each independently latches the memory control data, DMA data, interrupt processing data and command data respectively are provided, and it was decided that the output data of these latch circuits are selected and outputted by selector 5. Here, the selection condition of the selector 5 is outputted by the priority control 9 based on various control signals and applicable priorities. When this was done, the time that each data is transmitted to ALU 10, command step decoder 6 and alike became shortened.

To Italian readers: Would you mind properly translating the above for my study?

And you can read the entire patent description https://patentfield.com/patents/JP19910204502#description The automatic translation on the upper right works better than nothing ;) I am sure this is the principle that underlies R800. I looked past this patent because the company name was MediaLeaves the later corporate name for ASCII.

Par thegeps

Champion (278)

Portrait de thegeps

07-05-2019, 10:06

Takamichi wrote:

[Purpose] The purpose is to eliminate the excess processing time when executing a DMA operation or memory refresh, and to provide central processing device that by doing so, enables very fast operation.

[Configuration] Latch circuits 1 through 4 of which each independently latches the memory control data, DMA data, interrupt processing data and command data respectively are provided, and it was decided that the output data of these latch circuits are selected and outputted by selector 5. Here, the selection condition of the selector 5 is outputted by the priority control 9 based on various control signals and applicable priorities. When this was done, the time that each data is transmitted to ALU 10, command step decoder 6 and alike became shortened.

[Proposito (intenzione)] Il proposito è di eliminare il tempo di esecuzione in eccesso quando si esegue un'operazione DMA (accesso diretto alla memoria) o un refresh della memoria, e di fornire um disposirivo centrale di processo (I think it's CPU?) Che facendo questo, abilita un'esecuzione davvero molto veloce.

[Configurazione]Sono presenti (forniti/provided) i circuiti di chiusura da 1 a 4 che indipendentemente chiudono i dati di controllo memoria, i dati DMA, i dati del processo interrupt e i dati di comando, ed è stato deciso che i dati in uscita di questi circuiti di chiusura siano selezionati ed emessi dal selettore 5. La condizione di selezione del selettore 5 è decisa (emessa?) dal controllo di priorità 9 a seconda di vari segnali di controllo e priorità applicabii. Quando queste operazioni sono eseguite, mentre ogni dato viene trasmesso all'ALU10, viene inviato un comando allo step decoder 6 che così viene cortocircuitato (chiuso? Forse si tratta di contatti? Maybe they work as open/close contacts?)

I hope this will help Smile

Par Takamichi

Champion (261)

Portrait de Takamichi

07-05-2019, 13:03

Thank you for the translation. Yes central processing device = CPU but it was not deliberately stated so in Japanese original. I guess "cortocircuitato" is not appropriate word here, because "shortened" here means that the time that a data takes to reach ALU 10 or command step decoder 6 becomes shorter (earlier/faster) and not that a short circuit happens. Whatever I stop about asking about Italian language cosi fuori tema Wink

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