I/O Capture cartridge

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Par NYYRIKKI

Enlighted (5939)

Portrait de NYYRIKKI

13-02-2010, 00:54

Yes, I think so too... This is all wrong I think, but the capture idea should be something like...

msx.fi/temp/opll.png

... and reading back the values is not even here...

Anyway... back to the beginning...

What do you think?
Would it be Hard / Easy to implement?
Expensive / inexpensive?
Most importantly would it be usefull or would you consider it Useless because of all the emulators around?

Par DD

Expert (88)

Portrait de DD

27-02-2010, 21:16

This is a very good idea i think. Some years ago i also needed an option to capture data which is written to I/O ports, it would be very useful but i stopped with it after thinking about a concept.

Leo's schematic is doable on a PCB with 'normal' components without an FPGA, it stores the data of the last OUT intructions of each I/O port. (connect WR of the SRAM to WR of the slot as in your text) It stores the last byte written to an I/O address. If your really want to determine the VDP registers or FM-Pac registers afterwards then all write's to I/O address &H7C (FM-Pac) or &H99 (VDP) must be stored sequentially...

In this case indeed the components in your picture are needed and also a binary counter to increase the address of the SRAM after each write action, to store next data one address further. Another issue is the difference between &H7C and &H7D, if you want to read back the data which was written to the FM-Pac there should be a possibility to see if the data was written to &H7C or &H7D. And i think if you want to reproduce music for example the time between the write actions must be know as well.

At this moment i have made a cart with an FPGA and 16meg SDRAM where it ahould be possible to implement. I can give it a try, making a part of memory (don't need 16meg anyway) where data to FM-Pac will be written to:

Byte 0 the port number (&H7C / &H7D)
Byte 1 the data to the port
Byte 2 time between this byte and last byte (don't know the best resolution actually)

I really think it is nice to have this option, now i am busy with developing other MSX hardware as well and it is probably the best way to finish that first instead of making a number of half products, anyway i wrote it in my todo list.

Par Leo

Paragon (1236)

Portrait de Leo

27-02-2010, 22:33

whooa .... picture ?
an other solution ... weird :
replace z80 with Z280
with Z280 in user mode you can trap all I/O access

Par NYYRIKKI

Enlighted (5939)

Portrait de NYYRIKKI

28-02-2010, 07:29

I still think that modeling the internal OPLL & VDP registers is better way to go than recording RAW data going to ports... I think it is better to measure time between I/O with software. Although recording ALL data gives exact information what has happened, it is pain in the *** to do data mining in order to get current status.

Par Leo

Paragon (1236)

Portrait de Leo

28-02-2010, 09:57

you might be right , especially for autoincrements acces to vdp vram or registers , palette , what about status registers of vdp should they be modeled ? all depends if one plug the the model instead of real hw
or not .

Par NYYRIKKI

Enlighted (5939)

Portrait de NYYRIKKI

28-02-2010, 11:28

I'm still thinking this as a cartridge that you can plug to any MSX (TMS99XX or V99X8) to enhange the original chips features with readback option.

So... I don't think VDP status registers or VRAM are interesting to implement as they can be read back from real VDP anyway... I also don't think that you can get the status register information correct no matter what you do and VRAM is very hard because of VDP commands.

How ever I agree that autoincrement of registers and palette need to be handled correctly... I also know that reading back values like SX or SY will not give current value, but the value that was written to the registers, but that I think is the programmers problem.

Par NYYRIKKI

Enlighted (5939)

Portrait de NYYRIKKI

28-02-2010, 11:56

Ok, I'll copy PingPong's idea here as well...

If we would add also resetable 15716.99 Hz (interrupt) counter to this project, we could get line interrupts also for MSX1.

Par Leo

Paragon (1236)

Portrait de Leo

28-02-2010, 12:40

interrupt at 15khz ??? that makes an interupt every 10 instruction .. or so ...
...
ah ok i get it , you mean like msx2 : get an interrupt or a given line# , so only once per frame ?

Par NYYRIKKI

Enlighted (5939)

Portrait de NYYRIKKI

28-02-2010, 22:51

Yes, I was thinking interrupt on given value (at least 9 bits needed)... Also reading the counter would give you the line VDP is drawing at the moment... The interrupt counter would increase once at every ~228 clocks and software could be used to syncronize it with VDP interrupt.

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