Philips NMS 8255/8250 memory upgrade (again!)

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By Wild_Penguin

Hero (641)

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16-11-2015, 17:23

RetroTechie, thanks for your detailed reply!

One reason I am making this, is to learn a little bit about how the mapper actually works. I've been looking at the datasheets of the involved chips before, but your post makes it quite clear. So I guess the goal about learning something about MSX memory mappers has been reached!

I've also seen your MSX mapper page and downloaded the files before (but haven't had time to study them in detail before). I'll see, maybe I will put togerher a SRAM upgrade later on - and if I do, I will put up the result somewhere as an example.

By Wild_Penguin

Hero (641)

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30-11-2015, 19:46

I finally got the mapper working, after being busy with other duties Running Naked in a Field of Flowers

Long story short: Original instructions way of wiring up the 139 for RAM selection makes no sense. A working example below.

At first I built it the way I described - almost identical to the instructions, but with STROBE (CAS2/E) and 670's Q2 swapped. MSX booted, but MSXDOS2 was not usable (would not boot / be recognized), and memory test hang before it displayed the mapper size. But Maarten Veerheijdt's testmap 4.2 came in handy, and there was address errors reported above 0x8000 (32kb). 512kb was found with a basic testing program, however. So, I concluded that maybe just the first 32kb is usable, altough the mapper itself is working.

Also, as a sidenote: if one owns a memory mapper and inserts it in a lower slot - for example, I have PlaySoniq - the mapper on the lowest slot will be used. This came in handy while testing the built-in mapper, since I could always have a working mapper / memory, and test the faulty one!

So I did some more testing - there's really three alternatives that can fail that I can think of: the mapper circuit (which seemed to be working), the RAM chips, or the RAM chip selection (which can not be seen by mapper test programs). So I went back to the drawing board, and looked at the circuit once more with thought. I was at first assuming that there is only some small error in the instructions, and working on that assumption. But I started to suspect otherwise and started to think how the mapper should really work (with help from RetroTechis post), and I concluded that only one CAS should be active from the 139 (I'm calling the Y outputs CASX from now on). I can not see how the original instructions could achieve that, even with the modification I had already made.

If using 139, the first thing is that one (and only one!) of the 139's G (enable) inputs should be active if CAS2/E is active (low). The original mapper on the MB achives this by splitting CAS2/E into CAS1 and 2. A lot of other mapper circuits use only the original 670 (it has one unused register bit, which can be used to expand up to 256kb), and use CAS2/E as "STROBE" and generate the selections signals by other means - or, add their own register bits and bypass the original 670 altogether in this regard. Seeems like someone just draw up the instructions based on some other instructions (perhaps 256kb mapper instructions), with selection bits from the new 670 and the old 670's bit randomly connected into the 139 (note: I didn't actually built it that way, but I still can not see how it could work).

So I modified the circuit, so that I take original CAS1 and CAS2 signals already split on the MB to G1 and G2 (the order shouldn't matter) and the bits added by the new 670 to both A selectors and both B selectors. This way the mapper works (at least according to maptest). Now I need to find a way to stress test the memory to actually test if the chips are good or not Big smile

Let this post be as a reminder and a lesson here for everyone else considering doing something simiilar - or different - modification. There really can be faulty instructions out there, so understanding them is quite important.

Cheers!

By RetroTechie

Paragon (1563)

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01-12-2015, 12:10

Connections from the '125 Y outputs back to Dx are mixed up. That way, mapper may work fine but reading back mapper registers will swap some bits.

How? Take D3. It goes to '670 D2 input. Corresponding output Q2 goes to the '125 2A input. Finally, corresponding output 2Y should connect back to D3. Why? Because data returned from there should correspond with data that was written for the same bit (D3 in this case) of the mapper registers. Instead you've got output 2Y wired to D4.

Easiest way to fix is (I think, you check Tongue ) connect the '125 2Y output back to D3 instead, and 1Y back to D4.

Secondly: the way you've decoded /CASx may work, but introduces an (unnecessary) extra delay. For what you're doing, better replace 2-to-4 decoder with a 3-to-8 decoder like the 74HCT138. Works the same way, only you'd have an extra select input (A/B/C vs. A/B) which you'd wire to same expanded address line that splits /CAS2/E into /CAS1 and /CAS2. Note that 2 of those /CASx outputs take the place of /CAS1 and /CAS2 in the machine (in case you hadn't already wired things up that way).

Still thinking using such a pile of 4464's isn't elegant, but okay. Bonus points if you understand how to map RAM block #'s to specific (pairs of) RAM IC's. Big smile

P.S. please replace wiring diagram with a fixed version, so that others won't take faulty one as example...

By Wild_Penguin

Hero (641)

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01-12-2015, 14:58

Hi RetroTechie,

I was also wondering why not usea a 138 instead! But I already had the 139 othwerwise wired up. I actually have already bought a spare 138, in case I need it (for this project or later). I believe you'd need to pull up G2A&B (with a resistor to Vcc?) and connect CAS2/E to G1, is that correct?

I also believe I have the D lines correctly connected, and there is only errror in the picture introduced by me Crazy. At least testmap didn't report any errors. I will fix the picture later, and check my connections (though I'm not sure if flickr will allow swapping pictures, so this thread might look weird if someone is reading it later on). In any case, it's good that someone is proofreading this!

As for why using 4464 - well I already bought them before I knew what I was doing Big smile. I'd not do it in hindsight, and would not recommend using them to anyone. But if someone reading this still wants to use 4464's: make sure your source is good. I got used ones - with slightly bent pins (and one was clearly faulty - luckily I ordered some extra). As a reasult of the bent pins, the 4-storey houses of RAM look like they've been in an earthquake, but left standing. That may introduce some short circuits, since there is only 2mm (or so) space between the RAM chips on the PCB. If one chip is 0,3mm off, and the block of RAM is off in the opposite direction... there is suddenly 1,5mm clearance... hope the next floor is off in the other direction!

You can try to straighten the pins for as long as you like before soldering, if you like this kind of tinkering - but you probably get the picture. Big smile Evil

By RetroTechie

Paragon (1563)

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01-12-2015, 16:55

No need for mapper test program, a quick check in BASIC would show this.
For example write &b00010000 to I/O port &hFD, then a read from same I/O port should return &bxxx10000 (ignore "x" bits), that is: bits 0-4 the same as what you wrote. In case you swapped 1Y and 2Y outputs on the '125, you'd see return value &bxxx01000, that is: bit 3 and 4 swapped from what you wrote.

Wild_Penguin wrote:

I actually have already bought a spare 138, in case I need it (for this project or later). I believe you'd need to pull up G2A&B (with a resistor to Vcc?) and connect CAS2/E to G1, is that correct?

In the datasheet ("truth table") it shows that enable input G1 must be high, and enable inputs /G2A and /G2B must be low, and only then select inputs A/B/C decide which of /Y0../Y7 outputs goes low.
So you'd tie G1 to +5V, /CAS2/E to one of /G2A or /G2B, and the other of those 2 to GND (or if you're lazy, /G2A and /G2B both to /CAS2/E).
Then A/B/C to the expanded address lines, and /Y.. outputs are your /CASn outputs. The order isn't important, but if you treat C as most significant and A as least significant, so:
MA16 -> A
MA17 -> B
MA18 -> C
Then the relation between mapper block #'s and /Y.. is easier to follow. Makes it a little easier to map an error in mapper block X to a specific RAM IC.
Which sets of RAM IC's in your 4-high stacks map to which /Y.. output (and thus, to which mapper blocks) is something you can decide for yourself. Again: not really important as long as [in case of problems] you can determine which is which. And of course: each /Y.. output should connect to exactly 1 RAM IC that serves D0..D3, and 1 RAM IC that serves D4..D7.

By Wild_Penguin

Hero (641)

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01-12-2015, 18:05

RetroTechie wrote:

No need for mapper test program, a quick check in BASIC would show this.
For example write &b00010000 to I/O port &hFD, then a read from same I/O port should return &bxxx10000 (ignore "x" bits), that is: bits 0-4 the same as what you wrote. In case you swapped 1Y and 2Y outputs on the '125, you'd see return value &bxxx01000, that is: bit 3 and 4 swapped from what you wrote.

I believe I've done just this (I did test in BASIC, too, expecially with the broken 139 connections - and it worked OK). The error is just in the picture. I draw it late the other night and made an error =).

RetroTechie wrote:
Wild_Penguin wrote:

I actually have already bought a spare 138, in case I need it (for this project or later). I believe you'd need to pull up G2A&B (with a resistor to Vcc?) and connect CAS2/E to G1, is that correct?

In the datasheet ("truth table") it shows that enable input G1 must be high, and enable inputs /G2A and /G2B must be low --

I'm not sure how I've been looking at the datasheet : Eek! oO . Of course it is like you said.

One thing that is still unclear to me: when to use pull-up / -down resistors - and is it needed here? This is probably a very novice question, which Google will tell me, soon...

Thanks!

P.s. the picture has been replaced and can be found here. Hopefully flickr will delete / swap the original picture in the static URL reference in the previous post some day (I can't edit the post anymore).

By RetroTechie

Paragon (1563)

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01-12-2015, 18:08

Now you've swapped 2A and 2Y on the '125 = the 2Y output tied to an output of the '670 which is always active. Can't have that... LOL!

By Wild_Penguin

Hero (641)

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01-12-2015, 19:50

Whoops... oO fixed Wink

By Gregory

Master (178)

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06-08-2021, 12:12

Wild_Penguin wrote:

Hi,

I apologize if this has already been asked - I didn't find the answer by searching.

However, I'm making the 512kb expansion with 4464 memory chips . I'm having troube identifying where is the STROBE (sorry no upperline here oO ) signal is. The instructions is ambiguous.

In the instructions it says:

nms512kmemory.pdf wrote:

The signal called STROBE, can be obtained from pin 2 of IC 74ls32.

Well, OK - but there are three 74ls32's in the immediate vicinity (and a bunch more in the "north" part of the MB)! I tried to look at the service manual for the STROBE, but couldn't identify it - and the inner workings of the memory mapper hasn't opened up to me enough to completely understand what I am doing .... :evil:

The 256kb update (which uses the same chips but only half of the amount) connects pin1 of 74ls139 to IC111 (74ls32) pin 2 instead.

Thanks all!

p.s. I have to mention, that the "new old stock" I was supposedly ordering, seems to be used chips - bent and even dirty chip legs, and mixed batch numbers. But I ordered 20 - which means I have some extra - and I tested them and enough of them seemingly work (well, one didn't, and ones leg broke loose suddenly even before I tested it). In hindsight, maybe I should have gotten a 512kb SRAM and put together an instruction for using those chips, as I noticed there is some SRAM upgrade instructions on the page for 256kb which may even be enough for me to adapt the upgrade to 512 kb. I may do that later, especially if these chips turn out to be unstable in use.

The '256kb update' link doesn't work anymore and i can't seem to find it on filehunter. Any suggestions...
Or does anyone have a link for an internal SRAM memory conversion for a 8250 istead of using the stacked version of '41464' DRAMs?

By Meits

Scribe (6446)

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06-08-2021, 12:11

Chances are it's the exact same file as this.

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