Interrupts and gfx9000

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By assembler

Champion (378)

assembler의 아바타

28-07-2012, 11:26

I'm trying to use the vertical retrace interruption of GFX9000, but it's fired continously.

Only for testing, i've disabled VDP interrupt, and in openmsx debugger i can see when interrupt routine ends, it's launched again immediately.

The information in the yamaha manual is, for me, not clear enough.

Any help?

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By PingPong

Prophet (3460)

PingPong의 아바타

28-07-2012, 12:30

on older vdp's used on msx you need to aknowledge the interrupt, by reading a status register.
Maybe does it apply even to v9990?

from http://fms.komkon.org/MSX/Docs/V9990.txt

Quote:

These paragraph is interesting for programmers, if you don't know anything
about interrupts you'd better skip it.

The V9990 can generate interrupts caused by the following events:

1) Vertical blank (50/60 Hz)
2) When displaying a certain line (line interrupt)
3) When a command is finished
4) When displaying at a certain HORIZONTAL position
5) At the start of displaying EACH line

"The V9938 only supports 1 and 2. The advantage of 3 is clear. With 4 you can
make a "vertical screensplit", which is not possible on the V9938 (not a
stable one) and 5 is very nice for "waves".

To see what caused the interrupt you have to read a status register on the
MSX2, on the V9990 you only have to read the interrupt flag port (P#6) which
is much faster."

i think you also need to write the interrupt port to aknowledge the int and clear the bit, but i'm not sure.

By assembler

Champion (378)

assembler의 아바타

28-07-2012, 15:19

Yes, as Yamaha Manual explains, in "the interrupt flag port (P#6)", by writing "1", the related bit flag is reset.

Then when the interruption is executed, that bit should be 0, otherwise there is no reason to raise an interruption. The problem is that this bit is 1 at the beggining of the interruption.
????????????????????

The explanation for the bit 0 of interrupt register (R#9) is:
interrupt enable during vertical retrace line interval.
1: INT0 terminal becomes low level when V1 flag of P#6 is "1"
0: INT0 terminal does not change acording to V1 flag

I don't understand that. Question

By mohai

Paladin (841)

mohai의 아바타

28-07-2012, 18:10

The explanation for the bit 0 of interrupt register (R#9) is:
interrupt enable during vertical retrace line interval.
1: INT0 terminal becomes low level when V1 flag of P#6 is "1"
0: INT0 terminal does not change acording to V1 flag

This is the way i understand this:

If you set R#9, bit 0 to 1, then INT0 pin (pin in 9990 chip) changes to low level when V1 int happens
If you set R#9, bit 0 to 0, then INT0 pin does not change at all

By PingPong

Prophet (3460)

PingPong의 아바타

28-07-2012, 18:45

Assuming that openmsx emulation is reliable, maybe one of the openmsx developers can explain mechanics in handling interrupts and why interrupts keeps firing

By hap

Paragon (2021)

hap의 아바타

28-07-2012, 19:40

No, don't assume you can rely on openmsx emulation Shocked!
Especially for gfx9000, you should test regularly on a real cartridge. This also means I suggest you to do your interrupt testing on the cartridge yourself, and not ask someone to explain how an emulator does it.

By assembler

Champion (378)

assembler의 아바타

28-07-2012, 19:44

I've tried in a real gfx9000, and it have the same behaviour.

By hit9918

Prophet (2868)

hit9918의 아바타

28-07-2012, 21:41

Maybe another interrupt fired?

By assembler

Champion (378)

assembler의 아바타

28-07-2012, 22:30

I think the only possible is the VDP and it's disabled

in a,[0x99]
ld a,01010000b
out [0x99],a
ld a,128+1
out [0x99],a

By PingPong

Prophet (3460)

PingPong의 아바타

29-07-2012, 08:20

hap wrote:

No, don't assume you can rely on openmsx emulation Shocked!
Especially for gfx9000, you should test regularly on a real cartridge. This also means I suggest you to do your interrupt testing on the cartridge yourself, and not ask someone to explain how an emulator does it.

the problem here is a insufficient knowledge of v9990. i've checked v9990 datasheet and i cannot find an explanation of how to to handle v9990 ints. So the another (and maybe the only) source of knowledge is openmsx.
Because openmsx does the same things in this situation as the real hardware , meaning it is quite reliable , i think one can try to derive that missing knowledge by examining the openmsx sources.

By wouter_

Champion (418)

wouter_의 아바타

29-07-2012, 11:03

You could use the following script in openMSX to show the exact reason why the Z80/R800 enters the IRQ routine.

proc acceptIRQ {} {
	puts -nonewline stderr "CPU accepted an IRQ:"
	foreach probe [debug probe list] {
		if {([debug probe desc $probe] eq "Outgoing IRQ signal.") &&
		    [debug probe read $probe]} {
			puts -nonewline stderr " $probe"
		}
	}
	puts stderr ""
}
debug probe set_bp z80.acceptIRQ 1 acceptIRQ

Save this script to a file (e.g. irq.tcl) and then execute it in openMSX (in the openMSX console type source irq.tcl). As always feel free to tweak this script for your exact needs. E.g. it might be useful to also print the moment in time the IRQ is occurring.

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