interrupts and VDP access

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By Sepulep

Supporter (15)

Sepulep의 아바타

15-07-2018, 11:17

maybe/ probably this is answered somewhere already, but I couldn't easily figure it out:

if you have an interrupt function that accesses the VDP, will this interfere with any VDP code that is interrupted? As far as I understood the state of the Z80 is restored after the interrupt, but this is not the case for the VDP - so is it safe to have an interrupt with drawing code?

(e.g. combining an interrupt drawing the mouse pointer with other code updating the screen in a mainloop?)

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By Sandy Brand

Master (142)

Sandy Brand의 아바타

15-07-2018, 11:26

Yes that is correct.

The VDP can only perform one 'drawing related command' at a time, which should thus either come from your main loop, or from the interrupt handler.

If you want to do both somehow, you should wait for the currently running command to finish by checking the CE bit in VDP status register S2. But you can potentially waste a lot of CPU cycles in doing so, of course.

By santiontanon

Paladin (772)

santiontanon의 아바타

15-07-2018, 16:55

Nothing is restored after an interrupt as far as I know, not even the Z80 state. It is up to the interrupt code to save and restore register status. So, yeah, if you have your main code drawing on the VDP, and an interrupt that comes in the middle, they will interfere.

By yzi

Champion (441)

yzi의 아바타

15-07-2018, 17:08

If the "main program" as well as the interrupt routine are completely in your own control, then you can set up some kind of a synchronization mechanism, for example to have the main program disable interrupts during all VDP access routines.

By Dolphin101546015

Rookie (30)

Dolphin101546015의 아바타

15-07-2018, 22:16

Nothing bad, when you have interrupts with exchanging data between CPU and VDP, if your interrupts not handle another VDP function calls. Also nothing bad, except one case: when you using VDP-status registers. Smile

By Sepulep

Supporter (15)

Sepulep의 아바타

16-07-2018, 10:12

ok, thanks, I got also confused because of the implied ei in BIOS calls...

By Metalion

Paladin (987)

Metalion의 아바타

16-07-2018, 11:54

santiontanon wrote:

Nothing is restored after an interrupt as far as I know, not even the Z80 state. It is up to the interrupt code to save and restore register status.

No, that's incorrect. At 0038h, all registers (even alternate ones) are saved to stack before calling the interrupt hook. And they are restored after returning from it.

By Grauw

Enlighted (8012)

Grauw의 아바타

16-07-2018, 11:41

Accessing a VDP register is done in two steps, out (99H),value and out (99H),register, between those two steps no interrupt may occur because the ISR does an in (99H) (and potentially other VDP access) which interrupts the write sequence. So you di before the first out and ei after the second (or actually right before due to the 1-instruction delay of ei) to prevent issues with the ISR.

The standard ISR does not execute any VDP commands, but of course when you have a ISR hook which does then you need to take care using those in the main loop because they take time to execute and would make the CPU wait in the ISR for the currently running one to complete. Ditto if you’re accessing VRAM on both the main loop and the ISR. There’s no issue when you’re just modifying registers though, or executing only commands on the main loop and only accessing VRAM on the ISR, etc.

By Dolphin101546015

Rookie (30)

Dolphin101546015의 아바타

16-07-2018, 12:05

Grauw wrote:

Accessing a VDP register is done in two steps, out (99H),value and out (99H),register, between those two steps no interrupt may occur because the ISR does an in (99H) (and potentially other VDP access) which interrupts the write sequence. So you di before the first out and ei after the second (or actually right before due to the 1-instruction delay of ei) to prevent issues with the ISR.

You try it? I do. If no VDP ports requests in ISR time, nothing bad happen. Ofc, if you correctly save and restore registers in ISR. So, even between palette writing, if you select another VDP operation, VDP just reset last operation with writing RED+BLUE values, without GREEN. In all cases, VDP will wait second operand, when your ISR is exec. It's Wrong?
PS: I will also know possible problems, coz i need using VDP in stand alone device.

By Grauw

Enlighted (8012)

Grauw의 아바타

16-07-2018, 14:30

Yes, I’m positive. VDP status register reads clear any latched register write value. And a status register read is generally unavoidable on the ISR. So if you didn’t have any issues, you were lucky interrupts didn’t occur at a bad time.

Additionally, worth noting, palette writes use the same latch as register writes. So if you access any register on the ISR you also need to also disable interrupts between every pair of palette writes. You can’t interleave the register and palette write pairs either, but that’s probably not something one would commonly do anyway. And indirect register writes also use the latch, even though nothing actually needs to be latched.

I actually encountered the palette latch issue recently, getting a messed up palette at seemingly random depending on when exactly the ISR would occur :). Though thanks to openMSX emulation determinism between runs I was able to debug it easily.

By Dolphin101546015

Rookie (30)

Dolphin101546015의 아바타

16-07-2018, 14:46

Grauw wrote:

Yes, I’m positive. VDP status register reads clear any latched register write value. And a status register read is generally unavoidable on the ISR. So if you didn’t have any issues, you were lucky interrupts didn’t occur at a bad time.

Dude, and now please read all my messages above.

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