ADVRAM

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Van PingPong

Prophet (3756)

afbeelding van PingPong

13-01-2009, 19:56

thx, Fudeba. Would be nice to have the schematics. Anyone know about it?

Van mohai

Paladin (930)

afbeelding van mohai

30-01-2009, 12:42

I think the wait-states are already solved in the original MSX hardware.
The wait pin in the Z80 is activated when VDP is accessing to VRAM and Z80 tries to read/write to VDP, isn't it?
If so, then the solution is to disable WAIT pin to Z80 and have a couple of chips to demultiplex addresses and data, have Z80 to take priority over VRAM bus and always grant access with no delay.

VDP reads VRAM at refresh time, so this behaviour would not "lock" VDP at all. I think only some "blitter" effects could happen, as VDP could read "garbage" data in a one-frame-time, but screen would be correctly redrawn in the next "granted" read cycle. Notice that blitter effects are easily obtained in other systems that use this kind of busses and, on the other hand, MSX can never do with actual hard.

... and yes, it would be nice to have the schematics, as this device will never be manufactured to be sold ...

Van PingPong

Prophet (3756)

afbeelding van PingPong

30-01-2009, 18:44

I think the wait-states are already solved in the original MSX hardware.
The wait pin in the Z80 is activated when VDP is accessing to VRAM and Z80 tries to read/write to VDP, isn't it?

No, only under certain circumstances AND only on msx2+ (V9958).

If they worked as you described there was no need to slow down (in sw) the out instructions outside vblank time :-(


If so, then the solution is to disable WAIT pin to Z80 and have a couple of chips to demultiplex addresses and data, have Z80 to take priority over VRAM bus and always grant access with no delay.

VDP reads VRAM at refresh time, so this behaviour would not "lock" VDP at all. I think only some "blitter" effects could happen, as VDP could read "garbage" data in a one-frame-time, but screen would be correctly redrawn in the next "granted" read cycle. Notice that blitter effects are easily obtained in other systems that use this kind of busses and, on the other hand, MSX can never do with actual hard.

... and yes, it would be nice to have the schematics, as this device will never be manufactured to be sold ...
without some kind of syncronization or time slotting bad things happen. Look at the CGA snow flickering......

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