Msx1 race engine

Hmm, so what about backwards compatibility on MSX 2 then?
Was there no software written for MSX 1 that directly wrote to the VDP? I guess everyone had to use BIOS on MSX 1 with all the different access timings for differently produced display processors?

I think someone mentioned somewhere that only for MSX 2 did it become part of the standard to allow for directly writing to the VDP? I wonder why that was decided for MSX 2 then. Maybe they though it would not be feasible to do more advanced trickery that the V9938 could do (e.g.: screen-splits) if the BIOS was in the way?

And the high byte (bits A8-A13) is also used to store the VDP register number!

Tested with this program:

?VDP(2)
 0
' I'll use that in line 50 below
10 SCREEN 0:WIDTH 40:DEFUSR=&HD000 ' SCREEN 0 needed for AX-150
20 FOR N=&HD000 TO -1:READ A:POKE N,A:NEXT N
30 DATA 251,118:'EI, HALT (EI needed for AX-150)
35 '62 = LD A,N; 211 = OUT (N),A; 201=RET
40 DATA 62,39,211,&H99,62,&H40,211,&H99
50 DATA 62,0,211,&H99,62,&H82,211,&H99
60 DATA 62,33,211,&H98,201
RUN ' ignore Out of DATA
?USR(0)

On a TMS9129 and on a YM2220, the ! is written to VRAM address 0x200, not to 39.

Looks like the YM2220 has a very high degree of compatibility. Also, it seems they were aware of this effect and decided to remove it on the V9938.

Thanks for testing bsittler! Indeed YM2220 seems to be very compatible from all the tests I’ve seen so far. Looks like Yamaha acquired the blueprints from Texas Instruments.

Nope, because writing to a TMS9918 register changes the VRAM pointer as I mentioned in my first post. (Nothing to do with V9938 register 14.)

The V9938 does not have this limitation but it does not affect backwards compatibility since nobody should rely on this undocumented implementation detail of the TMS9918.

Sorry if it was confusing to bring up another implementation detail (incomplete VRAM pointer changes), it’s related because it’s the same underlying mechanism, but not related to the topic of this thread.

Uridium afaik only has VDP-specific code to deal with a difference in pattern table mirroring in screen 2 between the Texas Instruments TMS9918 and the Toshiba T6950 VDP.

The TI (and Yamaha) VDPs mirror the pattern table when the lower two bits of register 4 are set to 0, allowing you to use a single pattern table across the entire screen (instead of three). But this does not work on the T6950, so Uridium has a workaround for that.

Addendum: Simply put, internally the TMS9918 has a single 14-bit internal pointer for the VRAM address. When you set a VRAM read or write address this pointer is changed.

However because register writes are done with two OUTs, the VDP needs to remember the value of the first OUT. The TMS9918 re-uses the VRAM pointer address buffer for this (to reduce silicon space), so when you set a register the VRAM address pointer is also modified as a side-effect.