One chip MSX improvement project

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By HRA!

Champion (289)

Аватар пользователя HRA!

04-12-2009, 14:46

> What do you think about it? It it too hard to implement?

The keyboard controller of OCM has achieved the MSX keyboard emulation by using the logic circuit.
It is a very complex circuit.
It is not easyCrying

By caro

Hero (513)

Аватар пользователя caro

04-12-2009, 14:51

Hi, HRA!
Excuse me, it seems to me it is possible to make.
It will be necessary to add one more table of keys
and to switch it depending on a condition of the indicator NumLock

By vanfanel

Champion (446)

Аватар пользователя vanfanel

08-12-2009, 14:59

Have you guys tried MicroCabin games with this new OCM core?

I've tried XAK I and Fray, but they both lack music. I've read some pages ago in this thread that someone got those games workin: with music?? How??
I Use EP.COM to load the disk images.
regards

By SaebaMSX

Hero (533)

Аватар пользователя SaebaMSX

08-12-2009, 16:08

Microcabin games? I think they were working with music. Have you tried them in normal 3.58Mhz config? I could be wrong as I don't test my OCM for months now!

By vanfanel

Champion (446)

Аватар пользователя vanfanel

08-12-2009, 21:43

Yes, I tried them (Xak and Fray) in 3.58Mhz mode and in 10Mhz mode (in Altera DE1, it's switch 5). Same results in both modes... Can you verify it, please?

By KdL

Paragon (1450)

Аватар пользователя KdL

12-04-2010, 02:13

For error compiling OCM source on Quartus II 9.1 SP1 or later: www.msx.org/forumtopic10796.html

By KdL

Paragon (1450)

Аватар пользователя KdL

12-04-2010, 03:10

Quartus II 9.1 SP2 Web Edition notes:

- none license is required Smile
- multi processor cpu is not supported Sad
- this edition is 32bit only Sad
- below, a fit comparison from Quartus II 7.2sp3 W.E. for my OCM-PLD Pack v2.2b source code:

Fitter Status : Successful - Sun Apr 13 01:38:20 2008
Quartus II Version : 7.2 Build 207 03/18/2008 SP 3 SJ Web Edition
Revision Name : emsx_top
Top-level Entity Name : emsx_top
Family : Cyclone
Device : EP1C12Q240C8
Timing Models : Final
Total logic elements : 11,598 / 12,060 ( 96 % )
Total pins : 171 / 173 ( 99 % )
Total virtual pins : 0
Total memory bits : 63,608 / 239,616 ( 27 % )
Total PLLs : 1 / 2 ( 50 % )


Fitter Status : Successful - Mon Apr 12 02:46:12 2010
Quartus II Version : 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
Revision Name : emsx_top
Top-level Entity Name : emsx_top
Family : Cyclone
Device : EP1C12Q240C8
Timing Models : Final
Total logic elements : 11,695 / 12,060 ( 97 % )
Total pins : 171 / 173 ( 99 % )
Total virtual pins : 0
Total memory bits : 61,624 / 239,616 ( 26 % )
Total PLLs : 1 / 2 ( 50 % )


Logic elements are very high with 9.1sp2 !!!! CryingCryingCrying

By Leo

Paragon (1236)

Аватар пользователя Leo

12-04-2010, 07:49

I'm trying to understand (from my very low level of VHDL experience) if (and how) ocm performances could be improved.
In particular I'm focused on sdram controller/arbitrer.
If I understand correctly:
1) sdram actually works @ 85MHz with a CAS latency = 2.
2) sdram datasheet reports max working frequency = 160MHz but CAS latency needs to be become 3.
3) ram/vram access bandwidth is limited to an effective 10,5MHz because sdram controller circuitry is based upon an 8 states statemachine, this implies limiting core frequency to 10,5MHz

Now here are my questions:
1) clocking T80 @ 21MHz has proven to provoke instability, did anybody try with an intermediate 14MHz Question
2) apart from optimizing T80 execution timing, is there a way to improve ram access bandwidth (and so cpu performance) by using an higher sdram frequency still mantaining stability Question

Thanks for your attention

to improve cpu speed you need

1) a z80 core that executes 1 instruction per cycle , the
fz80.v core used for pc8800 in fpga can be suitable.

2) faster clock and then ram access , as you say.
i) local cache memory can improce speed while keeping external ram bus at low speed.
the z280 has 256 byte of cache , for instance , but the vhdl is to be written ... that
cache system would be aware of slot/mapper page change : hard.
for instance the z280 canhave clock ratio of 1/2 or 1/4th
ii) 16 bit ram bus , maybe easier , a wrapper around z80 can do the job but instructions
needs to aligned to takethe best of it.
iii) faster ram/cpu bus clock : but it seems you are topping on this ...

By spl

Paragon (1470)

Аватар пользователя spl

12-04-2010, 07:57

What is the last "stable" 1CHIPMSX update?

The one I have is this: http://www.webalice.it/gnogni/ocm/20080413_OCM-PLD_Pack_v2.2b_by_KdL.rar from 2 years ago...

By Edwin

Paragon (1182)

Аватар пользователя Edwin

12-04-2010, 22:32

KdL> Also notice that the 9.1 version uses fewer memory bits. I suspect it may have optimised differently in the available space in order to achieve better execution speeds.

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